Path: blob/master/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause1%YAML 1.22---3$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Amlogic A1 PLL Clock Control Unit78maintainers:9- Neil Armstrong <neil.armstrong@linaro.org>10- Jerome Brunet <jbrunet@baylibre.com>11- Jian Hu <jian.hu@jian.hu.com>12- Dmitry Rokosov <ddrokosov@sberdevices.ru>1314properties:15compatible:16const: amlogic,a1-pll-clkc1718'#clock-cells':19const: 12021reg:22maxItems: 12324clocks:25items:26- description: input fixpll_in27- description: input hifipll_in28- description: input syspll_in29minItems: 2 # syspll_in is optional3031clock-names:32items:33- const: fixpll_in34- const: hifipll_in35- const: syspll_in36minItems: 2 # syspll_in is optional3738required:39- compatible40- '#clock-cells'41- reg42- clocks43- clock-names4445additionalProperties: false4647examples:48- |49#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>50apb {51#address-cells = <2>;52#size-cells = <2>;5354clock-controller@7c80 {55compatible = "amlogic,a1-pll-clkc";56reg = <0 0x7c80 0 0x18c>;57#clock-cells = <1>;58clocks = <&clkc_periphs CLKID_FIXPLL_IN>,59<&clkc_periphs CLKID_HIFIPLL_IN>,60<&clkc_periphs CLKID_SYSPLL_IN>;61clock-names = "fixpll_in", "hifipll_in", "syspll_in";62};63};646566