Path: blob/master/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries2%YAML 1.23---4$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-tdes.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#67title: Atmel Triple Data Encryption Standard (TDES) HW cryptographic accelerator89maintainers:10- Tudor Ambarus <tudor.ambarus@linaro.org>1112properties:13compatible:14oneOf:15- const: atmel,at91sam9g46-tdes16- items:17- enum:18- microchip,sam9x7-tdes19- microchip,sama7d65-tdes20- const: atmel,at91sam9g46-tdes2122reg:23maxItems: 12425interrupts:26maxItems: 12728clocks:29maxItems: 13031clock-names:32const: tdes_clk3334dmas:35items:36- description: TX DMA Channel37- description: RX DMA Channel3839dma-names:40items:41- const: tx42- const: rx4344required:45- compatible46- reg47- interrupts48- clocks49- clock-names5051additionalProperties: false5253examples:54- |55#include <dt-bindings/interrupt-controller/irq.h>56#include <dt-bindings/interrupt-controller/arm-gic.h>57#include <dt-bindings/clock/at91.h>58#include <dt-bindings/dma/at91.h>5960tdes: crypto@e2014000 {61compatible = "atmel,at91sam9g46-tdes";62reg = <0xe2014000 0x100>;63interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;64clocks = <&pmc PMC_TYPE_PERIPHERAL 96>;65clock-names = "tdes_clk";66dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>,67<&dma0 AT91_XDMAC_DT_PERID(53)>;68dma-names = "tx", "rx";69};707172