Path: blob/master/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0-mon.yaml
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# SPDX-License-Identifier: GPL-2.01# Copyright (C) 2008-2011 Freescale Semiconductor Inc.2%YAML 1.23---4$id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0-mon.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#67title: Freescale Secure Non-Volatile Storage (SNVS)89maintainers:10- '"Horia Geantă" <[email protected]>'11- Pankaj Gupta <pankaj.gupta@nxp.com>12- Gaurav Jain <gaurav.jain@nxp.com>1314description:15Node defines address range and the associated interrupt for the SNVS function.16This function monitors security state information & reports security17violations. This also included rtc, system power off and ON/OFF key.1819properties:20compatible:21oneOf:22- items:23- const: fsl,sec-v4.0-mon24- const: syscon25- const: simple-mfd26- items:27- const: fsl,sec-v5.0-mon28- const: fsl,sec-v4.0-mon29- items:30- enum:31- fsl,sec-v5.3-mon32- fsl,sec-v5.4-mon33- const: fsl,sec-v5.0-mon34- const: fsl,sec-v4.0-mon3536reg:37maxItems: 13839interrupts:40maxItems: 24142snvs-rtc-lp:43type: object44additionalProperties: false45description:46Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node4748properties:49compatible:50const: fsl,sec-v4.0-mon-rtc-lp5152clocks:53maxItems: 15455clock-names:56const: snvs-rtc5758interrupts:59# VFxxx has only one. What is the 2nd one?60minItems: 161maxItems: 26263regmap:64description: Parent node containing registers65$ref: /schemas/types.yaml#/definitions/phandle6667offset:68description: LP register offset69$ref: /schemas/types.yaml#/definitions/uint3270default: 0x347172required:73- compatible74- interrupts75- regmap7677snvs-powerkey:78type: object79additionalProperties: false80description:81The snvs-pwrkey is designed to enable POWER key function which controlled82by SNVS ONOFF, the driver can report the status of POWER key and wakeup83system if pressed after system suspend.8485$ref: /schemas/input/input.yaml8687properties:88compatible:89const: fsl,sec-v4.0-pwrkey9091clocks:92maxItems: 19394clock-names:95const: snvs-pwrkey9697interrupts:98maxItems: 199100regmap:101description: Parent node containing registers102$ref: /schemas/types.yaml#/definitions/phandle103104wakeup-source: true105106linux,keycode:107$ref: /schemas/types.yaml#/definitions/uint32108default: 116109deprecated: true110111linux,keycodes:112maxItems: 1113default: 116114115power-off-time-sec:116enum: [0, 5, 10, 15]117118required:119- compatible120- interrupts121- regmap122123snvs-lpgpr:124$ref: /schemas/nvmem/snvs-lpgpr.yaml#125126snvs-poweroff:127description:128The SNVS could drive signal to PMIC to turn off system power by setting129SNVS_LP LPCR register.130$ref: /schemas/power/reset/syscon-poweroff.yaml#131132required:133- compatible134- reg135136additionalProperties: false137138examples:139- |140#include <dt-bindings/interrupt-controller/arm-gic.h>141#include <dt-bindings/clock/imx7d-clock.h>142143sec_mon: sec-mon@314000 {144compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";145reg = <0x314000 0x1000>;146147snvs-rtc-lp {148compatible = "fsl,sec-v4.0-mon-rtc-lp";149regmap = <&sec_mon>;150offset = <0x34>;151clocks = <&clks IMX7D_SNVS_CLK>;152clock-names = "snvs-rtc";153interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,154<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;155};156157snvs-powerkey {158compatible = "fsl,sec-v4.0-pwrkey";159regmap = <&sec_mon>;160clocks = <&clks IMX7D_SNVS_CLK>;161clock-names = "snvs-pwrkey";162interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;163linux,keycode = <116>; /* KEY_POWER */164wakeup-source;165};166};167168169