Path: blob/master/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x78maintainers:9- J. Neuschäfer <j.ne@posteo.net>1011properties:12compatible:13description:14Should contain entries for this and backward compatible SEC versions,15high to low. Warning - SEC1 and SEC2 are mutually exclusive.16oneOf:17- items:18- const: fsl,sec3.319- const: fsl,sec3.120- const: fsl,sec3.021- const: fsl,sec2.422- const: fsl,sec2.223- const: fsl,sec2.124- const: fsl,sec2.025- items:26- const: fsl,sec3.127- const: fsl,sec3.028- const: fsl,sec2.429- const: fsl,sec2.230- const: fsl,sec2.131- const: fsl,sec2.032- items:33- const: fsl,sec3.034- const: fsl,sec2.435- const: fsl,sec2.236- const: fsl,sec2.137- const: fsl,sec2.038- items:39- const: fsl,sec2.440- const: fsl,sec2.241- const: fsl,sec2.142- const: fsl,sec2.043- items:44- const: fsl,sec2.245- const: fsl,sec2.146- const: fsl,sec2.047- items:48- const: fsl,sec2.149- const: fsl,sec2.050- items:51- const: fsl,sec2.052- items:53- const: fsl,sec1.254- const: fsl,sec1.055- items:56- const: fsl,sec1.05758reg:59maxItems: 16061interrupts:62maxItems: 16364fsl,num-channels:65$ref: /schemas/types.yaml#/definitions/uint3266enum: [ 1, 4 ]67description: An integer representing the number of channels available.6869fsl,channel-fifo-len:70$ref: /schemas/types.yaml#/definitions/uint3271maximum: 10072description:73An integer representing the number of descriptor pointers each channel74fetch fifo can hold.7576fsl,exec-units-mask:77$ref: /schemas/types.yaml#/definitions/uint3278maximum: 0xfff79description: |80The bitmask representing what execution units (EUs) are available.81EU information should be encoded following the SEC's Descriptor Header82Dword EU_SEL0 field documentation, i.e. as follows:8384bit 0 = reserved - should be 085bit 1 = set if SEC has the ARC4 EU (AFEU)86bit 2 = set if SEC has the DES/3DES EU (DEU)87bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)88bit 4 = set if SEC has the random number generator EU (RNG)89bit 5 = set if SEC has the public key EU (PKEU)90bit 6 = set if SEC has the AES EU (AESU)91bit 7 = set if SEC has the Kasumi EU (KEU)92bit 8 = set if SEC has the CRC EU (CRCU)93bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)9495remaining bits are reserved for future SEC EUs.9697fsl,descriptor-types-mask:98$ref: /schemas/types.yaml#/definitions/uint3299description: |100The bitmask representing what descriptors are available. Descriptor type101information should be encoded following the SEC's Descriptor Header Dword102DESC_TYPE field documentation, i.e. as follows:103104bit 0 = SEC supports descriptor type aesu_ctr_nonsnoop105bit 1 = SEC supports descriptor type ipsec_esp106bit 2 = SEC supports descriptor type common_nonsnoop107bit 3 = SEC supports descriptor type 802.11i AES ccmp108bit 4 = SEC supports descriptor type hmac_snoop_no_afeu109bit 5 = SEC supports descriptor type srtp110bit 6 = SEC supports descriptor type non_hmac_snoop_no_afeu111bit 7 = SEC supports descriptor type pkeu_assemble112bit 8 = SEC supports descriptor type aesu_key_expand_output113bit 9 = SEC supports descriptor type pkeu_ptmul114bit 10 = SEC supports descriptor type common_nonsnoop_afeu115bit 11 = SEC supports descriptor type pkeu_ptadd_dbl116117..and so on and so forth.118119required:120- compatible121- reg122- fsl,num-channels123- fsl,channel-fifo-len124- fsl,exec-units-mask125- fsl,descriptor-types-mask126127unevaluatedProperties: false128129examples:130- |131/* MPC8548E */132crypto@30000 {133compatible = "fsl,sec2.1", "fsl,sec2.0";134reg = <0x30000 0x10000>;135interrupts = <29 2>;136interrupt-parent = <&mpic>;137fsl,num-channels = <4>;138fsl,channel-fifo-len = <24>;139fsl,exec-units-mask = <0xfe>;140fsl,descriptor-types-mask = <0x12b0ebf>;141};142143...144145146