Path: blob/master/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Qualcomm crypto engine driver78maintainers:9- Bjorn Andersson <andersson@kernel.org>10- Konrad Dybcio <konradybcio@kernel.org>1112description:13This document defines the binding for the QCE crypto14controller found on Qualcomm parts.1516properties:17compatible:18oneOf:19- const: qcom,crypto-v5.120deprecated: true21description: Kept only for ABI backward compatibility2223- const: qcom,crypto-v5.424deprecated: true25description: Kept only for ABI backward compatibility2627- items:28- enum:29- qcom,ipq4019-qce30- qcom,sm8150-qce31- const: qcom,qce3233- items:34- enum:35- qcom,ipq6018-qce36- qcom,ipq8074-qce37- qcom,ipq9574-qce38- qcom,msm8996-qce39- qcom,qcm2290-qce40- qcom,sdm845-qce41- qcom,sm6115-qce42- const: qcom,ipq4019-qce43- const: qcom,qce4445- items:46- enum:47- qcom,kaanapali-qce48- qcom,qcs615-qce49- qcom,qcs8300-qce50- qcom,sa8775p-qce51- qcom,sc7280-qce52- qcom,sm6350-qce53- qcom,sm8250-qce54- qcom,sm8350-qce55- qcom,sm8450-qce56- qcom,sm8550-qce57- qcom,sm8650-qce58- qcom,sm8750-qce59- qcom,x1e80100-qce60- const: qcom,sm8150-qce61- const: qcom,qce6263reg:64maxItems: 16566clocks:67minItems: 168maxItems: 36970clock-names:71minItems: 172maxItems: 37374iommus:75minItems: 176maxItems: 877description:78phandle to apps_smmu node with sid mask.7980interconnects:81maxItems: 182description:83Interconnect path between qce crypto and main memory.8485interconnect-names:86const: memory8788dmas:89items:90- description: DMA specifiers for rx dma channel.91- description: DMA specifiers for tx dma channel.9293dma-names:94items:95- const: rx96- const: tx9798allOf:99- if:100properties:101compatible:102contains:103enum:104- qcom,crypto-v5.1105- qcom,crypto-v5.4106- qcom,ipq6018-qce107- qcom,ipq8074-qce108- qcom,ipq9574-qce109- qcom,msm8996-qce110- qcom,sdm845-qce111then:112properties:113clocks:114maxItems: 3115clock-names:116items:117- const: iface118- const: bus119- const: core120required:121- clocks122- clock-names123124- if:125properties:126compatible:127contains:128enum:129- qcom,qcm2290-qce130- qcom,sm6115-qce131then:132properties:133clocks:134maxItems: 1135clock-names:136items:137- const: core138required:139- clocks140- clock-names141142- if:143properties:144compatible:145contains:146enum:147- qcom,sm8150-qce148then:149properties:150clocks: false151clock-names: false152153required:154- compatible155- reg156- dmas157- dma-names158159additionalProperties: false160161examples:162- |163#include <dt-bindings/clock/qcom,gcc-apq8084.h>164crypto-engine@fd45a000 {165compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";166reg = <0xfd45a000 0x6000>;167clocks = <&gcc GCC_CE2_AHB_CLK>,168<&gcc GCC_CE2_AXI_CLK>,169<&gcc GCC_CE2_CLK>;170clock-names = "iface", "bus", "core";171dmas = <&cryptobam 2>, <&cryptobam 3>;172dma-names = "rx", "tx";173iommus = <&apps_smmu 0x584 0x0011>,174<&apps_smmu 0x586 0x0011>,175<&apps_smmu 0x594 0x0011>,176<&apps_smmu 0x596 0x0011>;177};178179180