Path: blob/master/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: STMicroelectronics STM32 HASH78description: The STM32 HASH block is built on the HASH block found in9the STn8820 SoC introduced in 2007, and subsequently used in the U850010SoC in 2010.1112maintainers:13- Lionel Debieve <lionel.debieve@foss.st.com>1415properties:16compatible:17enum:18- st,stn8820-hash19- stericsson,ux500-hash20- st,stm32f456-hash21- st,stm32f756-hash22- st,stm32mp13-hash2324reg:25maxItems: 12627clocks:28maxItems: 12930interrupts:31maxItems: 13233resets:34maxItems: 13536dmas:37maxItems: 13839dma-names:40items:41- const: in4243dma-maxburst:44description: Set number of maximum dma burst supported45$ref: /schemas/types.yaml#/definitions/uint3246minimum: 047maximum: 248default: 04950power-domains:51maxItems: 15253access-controllers:54minItems: 155maxItems: 25657required:58- compatible59- reg60- clocks6162allOf:63- if:64properties:65compatible:66items:67const: stericsson,ux500-hash68then:69properties:70interrupts: false71else:72required:73- interrupts7475additionalProperties: false7677examples:78- |79#include <dt-bindings/interrupt-controller/arm-gic.h>80#include <dt-bindings/clock/stm32mp1-clks.h>81#include <dt-bindings/reset/stm32mp1-resets.h>82hash@54002000 {83compatible = "st,stm32f756-hash";84reg = <0x54002000 0x400>;85interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;86clocks = <&rcc HASH1>;87resets = <&rcc HASH1_R>;88dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>;89dma-names = "in";90dma-maxburst = <2>;91};9293...949596