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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml
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# SPDX-License-Identifier: GPL-2.0

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%YAML 1.2

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---

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$id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-drc.yaml#

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$schema: http://devicetree.org/meta-schemas/core.yaml#

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title: Allwinner A31 Dynamic Range Controller

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maintainers:

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  - Chen-Yu Tsai <wens@csie.org>

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  - Maxime Ripard <mripard@kernel.org>

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description: |

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  The DRC (Dynamic Range Controller) allows to dynamically adjust

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  pixel brightness/contrast based on histogram measurements for LCD

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  content adaptive backlight control.

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properties:

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  compatible:

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    enum:

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      - allwinner,sun6i-a31-drc

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      - allwinner,sun6i-a31s-drc

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      - allwinner,sun8i-a23-drc

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      - allwinner,sun8i-a33-drc

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      - allwinner,sun9i-a80-drc

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  reg:

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    maxItems: 1

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  interrupts:

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    maxItems: 1

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  clocks:

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    items:

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      - description: The DRC interface clock

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      - description: The DRC module clock

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      - description: The DRC DRAM clock

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  clock-names:

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    items:

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      - const: ahb

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      - const: mod

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      - const: ram

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  resets:

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    maxItems: 1

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  ports:

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    $ref: /schemas/graph.yaml#/properties/ports

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    properties:

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      port@0:

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        $ref: /schemas/graph.yaml#/properties/port

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        description: |

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          Input endpoints of the controller.

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      port@1:

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        $ref: /schemas/graph.yaml#/properties/port

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        description: |

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          Output endpoints of the controller.

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    required:

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      - port@0

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      - port@1

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required:

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  - compatible

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  - reg

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  - interrupts

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  - clocks

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  - clock-names

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  - resets

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  - ports

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additionalProperties: false

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examples:

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  - |

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    #include <dt-bindings/interrupt-controller/arm-gic.h>

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    #include <dt-bindings/clock/sun6i-a31-ccu.h>

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    #include <dt-bindings/reset/sun6i-a31-ccu.h>

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    drc0: drc@1e70000 {

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        compatible = "allwinner,sun6i-a31-drc";

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        reg = <0x01e70000 0x10000>;

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        interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;

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        clocks = <&ccu CLK_AHB1_DRC0>, <&ccu CLK_IEP_DRC0>,

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                 <&ccu CLK_DRAM_DRC0>;

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        clock-names = "ahb", "mod",

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                      "ram";

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        resets = <&ccu RST_AHB1_DRC0>;

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        ports {

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            #address-cells = <1>;

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            #size-cells = <0>;

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            drc0_in: port@0 {

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                reg = <0>;

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                drc0_in_be0: endpoint {

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                    remote-endpoint = <&be0_out_drc0>;

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                };

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            };

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            drc0_out: port@1 {

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                #address-cells = <1>;

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                #size-cells = <0>;

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                reg = <1>;

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                drc0_out_tcon0: endpoint@0 {

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                    reg = <0>;

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                    remote-endpoint = <&tcon0_in_drc0>;

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                };

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                drc0_out_tcon1: endpoint@1 {

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                    reg = <1>;

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                    remote-endpoint = <&tcon1_in_drc0>;

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                };

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            };

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        };

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    };

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...

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