Path: blob/master/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml
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# SPDX-License-Identifier: GPL-2.01%YAML 1.22---3$id: http://devicetree.org/schemas/display/allwinner,sun9i-a80-deu.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Allwinner A80 Detail Enhancement Unit78maintainers:9- Chen-Yu Tsai <wens@csie.org>10- Maxime Ripard <mripard@kernel.org>1112description: |13The DEU (Detail Enhancement Unit), found in the Allwinner A80 SoC,14can sharpen the display content in both luma and chroma channels.1516properties:17compatible:18const: allwinner,sun9i-a80-deu1920reg:21maxItems: 12223interrupts:24maxItems: 12526clocks:27items:28- description: The DEU interface clock29- description: The DEU module clock30- description: The DEU DRAM clock3132clock-names:33items:34- const: ahb35- const: mod36- const: ram3738resets:39maxItems: 14041ports:42$ref: /schemas/graph.yaml#/properties/ports4344properties:45port@0:46$ref: /schemas/graph.yaml#/properties/port47description: |48Input endpoints of the controller.4950port@1:51$ref: /schemas/graph.yaml#/properties/port52description: |53Output endpoints of the controller.5455required:56- port@057- port@15859required:60- compatible61- reg62- interrupts63- clocks64- clock-names65- resets66- ports6768additionalProperties: false6970examples:71- |72#include <dt-bindings/interrupt-controller/arm-gic.h>7374#include <dt-bindings/clock/sun9i-a80-de.h>75#include <dt-bindings/reset/sun9i-a80-de.h>7677deu0: deu@3300000 {78compatible = "allwinner,sun9i-a80-deu";79reg = <0x03300000 0x40000>;80interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;81clocks = <&de_clocks CLK_BUS_DEU0>,82<&de_clocks CLK_IEP_DEU0>,83<&de_clocks CLK_DRAM_DEU0>;84clock-names = "ahb",85"mod",86"ram";87resets = <&de_clocks RST_DEU0>;8889ports {90#address-cells = <1>;91#size-cells = <0>;9293deu0_in: port@0 {94reg = <0>;9596deu0_in_fe0: endpoint {97remote-endpoint = <&fe0_out_deu0>;98};99};100101deu0_out: port@1 {102#address-cells = <1>;103#size-cells = <0>;104reg = <1>;105106deu0_out_be0: endpoint@0 {107reg = <0>;108remote-endpoint = <&be0_in_deu0>;109};110111deu0_out_be1: endpoint@1 {112reg = <1>;113remote-endpoint = <&be1_in_deu0>;114};115};116};117};118119...120121122