Path: blob/master/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Arm HDLCD display controller78maintainers:9- Liviu Dudau <Liviu.Dudau@arm.com>10- Andre Przywara <andre.przywara@arm.com>1112description:13The Arm HDLCD is a display controller found on several development platforms14produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an15RGB streamer that reads the data from a framebuffer and sends it to a single16digital encoder (DVI or HDMI).1718properties:19compatible:20const: arm,hdlcd2122reg:23maxItems: 12425interrupts:26maxItems: 12728clock-names:29const: pxlclk3031clocks:32maxItems: 133description: The input reference for the pixel clock.3435memory-region:36maxItems: 137description:38Phandle to a node describing memory to be used for the framebuffer.39If not present, the framebuffer may be located anywhere in memory.4041iommus:42maxItems: 14344port:45$ref: /schemas/graph.yaml#/properties/port46unevaluatedProperties: false47description:48Output endpoint of the controller, connecting the LCD panel signals.4950additionalProperties: false5152required:53- compatible54- reg55- interrupts56- clocks57- port5859examples:60- |61hdlcd@2b000000 {62compatible = "arm,hdlcd";63reg = <0x2b000000 0x1000>;64interrupts = <0 85 4>;65clocks = <&oscclk5>;66clock-names = "pxlclk";67port {68hdlcd_output: endpoint {69remote-endpoint = <&hdmi_enc_input>;70};71};72};7374/* HDMI encoder on I2C bus */75i2c {76#address-cells = <1>;77#size-cells = <0>;78hdmi-transmitter@70 {79compatible = "nxp,tda998x";80reg = <0x70>;81port {82hdmi_enc_input: endpoint {83remote-endpoint = <&hdlcd_output>;84};85};86};87};88...899091