Path: blob/master/Documentation/devicetree/bindings/display/arm,malidp.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/display/arm,malidp.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Arm Mali Display Processor (Mali-DP)78maintainers:9- Liviu Dudau <Liviu.Dudau@arm.com>10- Andre Przywara <andre.przywara@arm.com>1112description:13The following bindings apply to a family of Display Processors sold as14licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and15DP650 processors that offer multiple composition layers, support for16rotation and scaling output.1718properties:19compatible:20enum:21- arm,mali-dp50022- arm,mali-dp55023- arm,mali-dp6502425reg:26maxItems: 12728interrupts:29items:30- description:31The interrupt used by the Display Engine (DE). Can be shared with32the interrupt for the Scaling Engine (SE), but it will have to be33listed individually.34- description:35The interrupt used by the Scaling Engine (SE). Can be shared with36the interrupt for the Display Engine (DE), but it will have to be37listed individually.3839interrupt-names:40items:41- const: DE42- const: SE4344clock-names:45items:46- const: pxlclk47- const: mclk48- const: aclk49- const: pclk5051clocks:52items:53- description: the pixel clock feeding the output PLL of the processor54- description: the main processor clock55- description: the AXI interface clock56- description: the APB interface clock5758memory-region:59maxItems: 160description:61Phandle to a node describing memory to be used for the framebuffer.62If not present, the framebuffer may be located anywhere in memory.6364arm,malidp-output-port-lines:65$ref: /schemas/types.yaml#/definitions/uint8-array66description:67Number of output lines/bits for each colour channel.68items:69- description: number of output lines for the red channel (R)70- description: number of output lines for the green channel (G)71- description: number of output lines for the blue channel (B)7273arm,malidp-arqos-value:74$ref: /schemas/types.yaml#/definitions/uint3275description:76Quality-of-Service value for the display engine FIFOs, to write77into the RQOS register of the DP500.78See the ARM Mali-DP500 TRM for details on the encoding.79If omitted, the RQOS register will not be changed.8081port:82$ref: /schemas/graph.yaml#/properties/port83unevaluatedProperties: false84description:85Output endpoint of the controller, connecting the LCD panel signals.8687additionalProperties: false8889required:90- compatible91- reg92- interrupts93- interrupt-names94- clocks95- clock-names96- port97- arm,malidp-output-port-lines9899examples:100- |101dp0: malidp@6f200000 {102compatible = "arm,mali-dp650";103reg = <0x6f200000 0x20000>;104memory-region = <&display_reserved>;105interrupts = <168>, <168>;106interrupt-names = "DE", "SE";107clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;108clock-names = "pxlclk", "mclk", "aclk", "pclk";109arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;110arm,malidp-arqos-value = <0xd000d000>;111112port {113dp0_output: endpoint {114remote-endpoint = <&tda998x_2_input>;115};116};117};118...119120121