Path: blob/master/Documentation/devicetree/bindings/display/arm,pl11x.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/display/arm,pl11x.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Arm PrimeCell Color LCD Controller PL110/PL11178maintainers:9- Liviu Dudau <Liviu.Dudau@arm.com>10- Andre Przywara <andre.przywara@arm.com>1112description:13The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out14a framebuffer region in system memory, and creates timed signals for15a variety of LCD panels.1617# We need a select here so we don't match all nodes with 'arm,primecell'18select:19properties:20compatible:21contains:22enum:23- arm,pl11024- arm,pl11125required:26- compatible2728properties:29compatible:30items:31- enum:32- arm,pl11033- arm,pl11134- const: arm,primecell3536reg:37maxItems: 13839interrupt-names:40oneOf:41- const: combined42description:43The IP provides four individual interrupt lines, but also one44combined line. If the integration only connects this line to the45interrupt controller, this single interrupt is noted here.46- items:47- const: mbe # CLCDMBEINTR48- const: vcomp # CLCDVCOMPINTR49- const: lnbu # CLCDLNBUINTR50- const: fuf # CLCDFUFINTR5152interrupts:53minItems: 154maxItems: 45556clock-names:57items:58- const: clcdclk59- const: apb_pclk6061clocks:62items:63- description: The CLCDCLK reference clock for the controller.64- description: The HCLK AHB slave clock for the register access.6566memory-region:67maxItems: 168description:69Phandle to a node describing memory to be used for the framebuffer.70If not present, the framebuffer may be located anywhere in memory.7172max-memory-bandwidth:73$ref: /schemas/types.yaml#/definitions/uint3274description:75Maximum bandwidth in bytes per second that the cell's memory interface76can handle.77If not present, the memory interface is fast enough to handle all78possible video modes.7980resets:81maxItems: 18283port:84$ref: /schemas/graph.yaml#/$defs/port-base85additionalProperties: false8687description:88Output endpoint of the controller, connecting the LCD panel signals.8990properties:91endpoint:92$ref: /schemas/graph.yaml#/$defs/endpoint-base93unevaluatedProperties: false9495properties:96arm,pl11x,tft-r0g0b0-pads:97$ref: /schemas/types.yaml#/definitions/uint32-array98items:99- description: index of CLD pad used for first red bit (R0)100- description: index of CLD pad used for first green bit (G0)101- description: index of CLD pad used for first blue bit (G0)102deprecated: true103description: |104DEPRECATED. An array of three 32-bit values, defining the way105CLD[23:0] pads are wired up.106The first value contains the index of the "CLD" external pin (pad)107used as R0 (first bit of the red component), the second value for108green, the third value for blue.109See also "LCD panel signal multiplexing details" paragraphs in the110PL110/PL111 Technical Reference Manuals.111This implicitly defines available color modes, for example:112- PL111 TFT 4:4:4 panel:113arm,pl11x,tft-r0g0b0-pads = <4 15 20>;114- PL110 TFT (1:)5:5:5 panel:115arm,pl11x,tft-r0g0b0-pads = <1 7 13>;116- PL111 TFT (1:)5:5:5 panel:117arm,pl11x,tft-r0g0b0-pads = <3 11 19>;118- PL111 TFT 5:6:5 panel:119arm,pl11x,tft-r0g0b0-pads = <3 10 19>;120- PL110 and PL111 TFT 8:8:8 panel:121arm,pl11x,tft-r0g0b0-pads = <0 8 16>;122- PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:123arm,pl11x,tft-r0g0b0-pads = <16 8 0>;124125additionalProperties: false126127required:128- compatible129- reg130- clock-names131- clocks132- port133134allOf:135- if:136properties:137interrupts:138minItems: 2139required:140- interrupts141then:142required:143- interrupt-names144145examples:146- |147clcd@10020000 {148compatible = "arm,pl111", "arm,primecell";149reg = <0x10020000 0x1000>;150interrupt-names = "combined";151interrupts = <44>;152clocks = <&oscclk1>, <&oscclk2>;153clock-names = "clcdclk", "apb_pclk";154max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */155156port {157clcd_pads: endpoint {158remote-endpoint = <&clcd_panel>;159};160};161};162163panel {164compatible = "arm,rtsm-display";165166port {167clcd_panel: endpoint {168remote-endpoint = <&clcd_pads>;169};170};171};172...173174175