Path: blob/master/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/display/bridge/adi,adv7533.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Analog Devices ADV7533/35 HDMI Encoders78maintainers:9- Laurent Pinchart <laurent.pinchart@ideasonboard.com>1011allOf:12- $ref: /schemas/sound/dai-common.yaml#1314description: |15The ADV7533 and ADV7535 are HDMI audio and video transmitters16compatible with HDMI 1.4 and DVI 1.0. They support color space17conversion, S/PDIF, CEC and HDCP. The transmitter input is MIPI DSI.1819properties:20compatible:21enum:22- adi,adv753323- adi,adv75352425reg:26description: |27I2C slave addresses.2829The ADV7533/35 internal registers are split into four pages30exposed through different I2C addresses, creating four register31maps. Each map has it own I2C address and acts as a standard slave32device on the I2C bus. The main address is mandatory, others are33optional and revert to defaults if not specified.34minItems: 135maxItems: 43637reg-names:38description:39Names of maps with programmable addresses. It can contain any map40needing a non-default address.41minItems: 142items:43- const: main44- const: edid45- const: cec46- const: packet4748clocks:49description: Reference to the CEC clock.50maxItems: 15152clock-names:53const: cec5455interrupts:56maxItems: 15758pd-gpios:59description: GPIO connected to the power down signal.60maxItems: 16162avdd-supply:63description: A 1.8V supply that powers up the AVDD pin.6465dvdd-supply:66description: A 1.8V supply that powers up the DVDD pin.6768pvdd-supply:69description: A 1.8V supply that powers up the PVDD pin.7071a2vdd-supply:72description: A 1.8V supply that powers up the A2VDD pin.7374v3p3-supply:75description: A 3.3V supply that powers up the V3P3 pin.7677v1p2-supply:78description:79A supply that powers up the V1P2 pin. It can be either 1.2V80or 1.8V for ADV7533 but only 1.8V for ADV7535.8182adi,disable-timing-generator:83description:84Disables the internal timing generator. The chip will rely on the85sync signals in the DSI data lanes, rather than generating its own86timings for HDMI output.87type: boolean8889adi,dsi-lanes:90description: Number of DSI data lanes connected to the DSI host.91$ref: /schemas/types.yaml#/definitions/uint3292enum: [ 2, 3, 4 ]9394"#sound-dai-cells":95const: 09697ports:98description:99The ADV7533/35 has two video ports and one audio port.100$ref: /schemas/graph.yaml#/properties/ports101102properties:103port@0:104description:105Video port for the DSI input. The remote endpoint phandle106should be a reference to a valid mipi_dsi_host_device.107$ref: /schemas/graph.yaml#/properties/port108109port@1:110description: Video port for the HDMI output.111$ref: /schemas/graph.yaml#/properties/port112113port@2:114description: Audio port for the HDMI output.115$ref: /schemas/graph.yaml#/properties/port116117required:118- compatible119- reg120- ports121- adi,dsi-lanes122- avdd-supply123- dvdd-supply124- pvdd-supply125- a2vdd-supply126- v3p3-supply127128additionalProperties: false129130examples:131- |132#include <dt-bindings/interrupt-controller/irq.h>133134i2c@e6500000 {135#address-cells = <1>;136#size-cells = <0>;137138reg = <0 0xe6500000>;139140adv7533: hdmi@39 {141compatible = "adi,adv7533";142/*143* The EDID page will be accessible on address 0x66 on the I2C144* bus. All other maps continue to use their default addresses.145*/146reg = <0x39>, <0x66>;147reg-names = "main", "edid";148interrupt-parent = <&gpio3>;149interrupts = <29 IRQ_TYPE_EDGE_FALLING>;150clocks = <&cec_clock>;151clock-names = "cec";152adi,dsi-lanes = <4>;153avdd-supply = <&v1v8>;154dvdd-supply = <&v1v8>;155pvdd-supply = <&v1v8>;156a2vdd-supply = <&v1v8>;157v3p3-supply = <&v3v3>;158159ports {160#address-cells = <1>;161#size-cells = <0>;162163port@0 {164reg = <0>;165adv7533_in: endpoint {166remote-endpoint = <&dsi_out>;167};168};169170port@1 {171reg = <1>;172adv7533_out: endpoint {173remote-endpoint = <&hdmi_connector_in>;174};175};176177port@2 {178reg = <2>;179codec_endpoint: endpoint {180remote-endpoint = <&i2s0_cpu_endpoint>;181};182};183};184};185};186187...188189190