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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

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%YAML 1.2

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---

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$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#

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$schema: http://devicetree.org/meta-schemas/core.yaml#

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title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface

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maintainers:

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  - Liu Ying <victor.liu@nxp.com>

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description: |

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  The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)

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  interfaces the pixel link 36-bit data output and the DSI controller’s

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  MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module

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  used in LVDS mode, to remap the pixel color codings between those modules.

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  This module is purely combinatorial.

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  The i.MX8qxp PXL2DPI is controlled by Control and Status Registers(CSR) module.

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  The CSR module, as a system controller, contains the PXL2DPI's configuration

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  register.

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properties:

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  compatible:

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    const: fsl,imx8qxp-pxl2dpi

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  fsl,sc-resource:

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    $ref: /schemas/types.yaml#/definitions/uint32

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    description: The SCU resource ID associated with this PXL2DPI instance.

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  power-domains:

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    maxItems: 1

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  fsl,companion-pxl2dpi:

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    $ref: /schemas/types.yaml#/definitions/phandle

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    description: |

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      A phandle which points to companion PXL2DPI which is used by downstream

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      LVDS Display Bridge(LDB) in split mode.

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  ports:

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    $ref: /schemas/graph.yaml#/properties/ports

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    properties:

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      port@0:

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        $ref: /schemas/graph.yaml#/properties/port

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        description: The PXL2DPI input port node from pixel link.

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      port@1:

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        $ref: /schemas/graph.yaml#/properties/port

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        description: The PXL2DPI output port node to downstream bridge.

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    required:

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      - port@0

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      - port@1

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required:

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  - compatible

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  - fsl,sc-resource

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  - power-domains

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  - ports

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additionalProperties: false

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examples:

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  - |

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    #include <dt-bindings/firmware/imx/rsrc.h>

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    pxl2dpi {

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        compatible = "fsl,imx8qxp-pxl2dpi";

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        fsl,sc-resource = <IMX_SC_R_MIPI_0>;

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        power-domains = <&pd IMX_SC_R_MIPI_0>;

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        ports {

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            #address-cells = <1>;

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            #size-cells = <0>;

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            port@0 {

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                #address-cells = <1>;

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                #size-cells = <0>;

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                reg = <0>;

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                mipi_lvds_0_pxl2dpi_dc_pixel_link0: endpoint@0 {

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                    reg = <0>;

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                    remote-endpoint = <&dc_pixel_link0_mipi_lvds_0_pxl2dpi>;

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                };

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                mipi_lvds_0_pxl2dpi_dc_pixel_link1: endpoint@1 {

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                     reg = <1>;

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                     remote-endpoint = <&dc_pixel_link1_mipi_lvds_0_pxl2dpi>;

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                };

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            };

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            port@1 {

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                #address-cells = <1>;

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                #size-cells = <0>;

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                reg = <1>;

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                mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {

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                    reg = <0>;

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                    remote-endpoint = <&mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi>;

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                };

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                mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {

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                    reg = <1>;

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                    remote-endpoint = <&mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi>;

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                };

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            };

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        };

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    };

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