Path: blob/master/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml
26309 views
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/display/bridge/intel,keembay-dsi.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Intel Keem Bay mipi dsi controller78maintainers:9- Anitha Chrisanthus <anitha.chrisanthus@intel.com>10- Edmond J Dea <edmund.j.dea@intel.com>1112properties:13compatible:14const: intel,keembay-dsi1516reg:17items:18- description: MIPI registers range1920reg-names:21items:22- const: mipi2324clocks:25items:26- description: MIPI DSI clock27- description: MIPI DSI econfig clock28- description: MIPI DSI config clock2930clock-names:31items:32- const: clk_mipi33- const: clk_mipi_ecfg34- const: clk_mipi_cfg3536ports:37$ref: /schemas/graph.yaml#/properties/ports3839properties:40port@0:41$ref: /schemas/graph.yaml#/properties/port42description: MIPI DSI input port.4344port@1:45$ref: /schemas/graph.yaml#/properties/port46description: DSI output port.4748required:49- port@050- port@15152required:53- compatible54- reg55- reg-names56- clocks57- clock-names58- ports5960additionalProperties: false6162examples:63- |64mipi-dsi@20900000 {65compatible = "intel,keembay-dsi";66reg = <0x20900000 0x4000>;67reg-names = "mipi";68clocks = <&scmi_clk 0x86>,69<&scmi_clk 0x88>,70<&scmi_clk 0x89>;71clock-names = "clk_mipi", "clk_mipi_ecfg",72"clk_mipi_cfg";7374ports {75#address-cells = <1>;76#size-cells = <0>;7778port@0 {79reg = <0>;80dsi_in: endpoint {81remote-endpoint = <&disp_out>;82};83};8485port@1 {86reg = <1>;87dsi_out: endpoint {88remote-endpoint = <&adv7535_input>;89};90};91};92};939495