Path: blob/master/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Renesas R-Car LVDS Encoder78maintainers:9- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>1011description: |12These DT bindings describe the LVDS encoder embedded in the Renesas R-Car13Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.1415properties:16compatible:17enum:18- renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders19- renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders20- renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders21- renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders22- renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders23- renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders24- renesas,r8a774e1-lvds # for RZ/G2H compatible LVDS encoders25- renesas,r8a7790-lvds # for R-Car H2 compatible LVDS encoders26- renesas,r8a7791-lvds # for R-Car M2-W compatible LVDS encoders27- renesas,r8a7793-lvds # for R-Car M2-N compatible LVDS encoders28- renesas,r8a7795-lvds # for R-Car H3 compatible LVDS encoders29- renesas,r8a7796-lvds # for R-Car M3-W compatible LVDS encoders30- renesas,r8a77961-lvds # for R-Car M3-W+ compatible LVDS encoders31- renesas,r8a77965-lvds # for R-Car M3-N compatible LVDS encoders32- renesas,r8a77970-lvds # for R-Car V3M compatible LVDS encoders33- renesas,r8a77980-lvds # for R-Car V3H compatible LVDS encoders34- renesas,r8a77990-lvds # for R-Car E3 compatible LVDS encoders35- renesas,r8a77995-lvds # for R-Car D3 compatible LVDS encoders3637reg:38maxItems: 13940clocks:41minItems: 142maxItems: 44344clock-names:45minItems: 146maxItems: 44748resets:49maxItems: 15051ports:52$ref: /schemas/graph.yaml#/properties/ports5354properties:55port@0:56$ref: /schemas/graph.yaml#/properties/port57description: Parallel RGB input port5859port@1:60$ref: /schemas/graph.yaml#/properties/port61description: LVDS output port6263required:64- port@065- port@16667power-domains:68maxItems: 16970renesas,companion:71$ref: /schemas/types.yaml#/definitions/phandle72description:73phandle to the companion LVDS encoder. This property is mandatory74for the first LVDS encoder on R-Car D3 and E3, and RZ/G2E SoCs, and shall75point to the second encoder to be used as a companion in dual-link mode.76It shall not be set for any other LVDS encoder.7778required:79- compatible80- reg81- clocks82- power-domains83- resets84- ports8586if:87properties:88compatible:89enum:90- renesas,r8a774c0-lvds91- renesas,r8a77990-lvds92- renesas,r8a77995-lvds93then:94properties:95clocks:96minItems: 197items:98- description: Functional clock99- description: EXTAL input clock100- description: DU_DOTCLKIN0 input clock101- description: DU_DOTCLKIN1 input clock102103clock-names:104minItems: 1105items:106- const: fck107# The LVDS encoder can use the EXTAL or DU_DOTCLKINx clocks.108# These clocks are optional.109- enum:110- extal111- dclkin.0112- dclkin.1113- enum:114- extal115- dclkin.0116- dclkin.1117- enum:118- extal119- dclkin.0120- dclkin.1121122required:123- clock-names124125else:126properties:127clocks:128items:129- description: Functional clock130131clock-names:132items:133- const: fck134135renesas,companion: false136137additionalProperties: false138139examples:140- |141#include <dt-bindings/clock/renesas-cpg-mssr.h>142#include <dt-bindings/power/r8a7795-sysc.h>143144lvds@feb90000 {145compatible = "renesas,r8a7795-lvds";146reg = <0xfeb90000 0x14>;147clocks = <&cpg CPG_MOD 727>;148power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;149resets = <&cpg 727>;150151ports {152#address-cells = <1>;153#size-cells = <0>;154155port@0 {156reg = <0>;157lvds_in: endpoint {158remote-endpoint = <&du_out_lvds0>;159};160};161port@1 {162reg = <1>;163lvds_out: endpoint {164remote-endpoint = <&panel_in>;165};166};167};168};169170- |171#include <dt-bindings/clock/renesas-cpg-mssr.h>172#include <dt-bindings/power/r8a77990-sysc.h>173174lvds0: lvds@feb90000 {175compatible = "renesas,r8a77990-lvds";176reg = <0xfeb90000 0x20>;177clocks = <&cpg CPG_MOD 727>,178<&x13_clk>,179<&extal_clk>;180clock-names = "fck", "dclkin.0", "extal";181power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;182resets = <&cpg 727>;183184renesas,companion = <&lvds1>;185186ports {187#address-cells = <1>;188#size-cells = <0>;189190port@0 {191reg = <0>;192lvds0_in: endpoint {193remote-endpoint = <&du_out_lvds0>;194};195};196port@1 {197reg = <1>;198lvds0_out: endpoint {199remote-endpoint = <&panel_in1>;200};201};202};203};204205lvds1: lvds@feb90100 {206compatible = "renesas,r8a77990-lvds";207reg = <0xfeb90100 0x20>;208clocks = <&cpg CPG_MOD 727>,209<&x13_clk>,210<&extal_clk>;211clock-names = "fck", "dclkin.0", "extal";212power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;213resets = <&cpg 726>;214215ports {216#address-cells = <1>;217#size-cells = <0>;218219port@0 {220reg = <0>;221lvds1_in: endpoint {222remote-endpoint = <&du_out_lvds1>;223};224};225port@1 {226reg = <1>;227lvds1_out: endpoint {228remote-endpoint = <&panel_in2>;229};230};231};232};233234...235236237