Path: blob/master/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi83.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip78maintainers:9- Marek Vasut <marex@denx.de>1011description: |12Texas Instruments SN65DSI83 1x Single-link MIPI DSI13to 1x Single-link LVDS14https://www.ti.com/lit/gpn/sn65dsi8315Texas Instruments SN65DSI84 1x Single-link MIPI DSI16to 1x Dual-link or 2x Single-link LVDS17https://www.ti.com/lit/gpn/sn65dsi841819properties:20compatible:21enum:22- ti,sn65dsi8323- ti,sn65dsi842425reg:26enum:27- 0x2c28- 0x2d2930enable-gpios:31maxItems: 132description: GPIO specifier for bridge_en pin (active high).3334vcc-supply:35description: A 1.8V power supply (see regulator/regulator.yaml).3637interrupts:38maxItems: 13940ports:41$ref: /schemas/graph.yaml#/properties/ports4243properties:44port@0:45$ref: /schemas/graph.yaml#/$defs/port-base46unevaluatedProperties: false47description: Video port for MIPI DSI Channel-A input4849properties:50endpoint:51$ref: /schemas/media/video-interfaces.yaml#52unevaluatedProperties: false5354properties:55data-lanes:56description: array of physical DSI data lane indexes.57minItems: 158items:59- const: 160- const: 261- const: 362- const: 46364port@1:65$ref: /schemas/graph.yaml#/$defs/port-base66unevaluatedProperties: false67description: Video port for MIPI DSI Channel-B input6869properties:70endpoint:71$ref: /schemas/media/video-interfaces.yaml#72unevaluatedProperties: false7374properties:75data-lanes:76description: array of physical DSI data lane indexes.77minItems: 178items:79- const: 180- const: 281- const: 382- const: 48384port@2:85description: Video port for LVDS Channel-A output (panel or bridge).86$ref: '#/$defs/lvds-port'8788port@3:89description: Video port for LVDS Channel-B output (panel or bridge).90$ref: '#/$defs/lvds-port'9192required:93- port@094- port@29596required:97- compatible98- reg99- ports100101$defs:102lvds-port:103$ref: /schemas/graph.yaml#/$defs/port-base104unevaluatedProperties: false105106properties:107endpoint:108$ref: /schemas/media/video-interfaces.yaml#109unevaluatedProperties: false110111properties:112ti,lvds-termination-ohms:113description: The value of near end differential termination in ohms.114enum: [100, 200]115default: 200116117ti,lvds-vod-swing-clock-microvolt:118description: LVDS diferential output voltage <min max> for clock119lanes in microvolts.120maxItems: 2121122ti,lvds-vod-swing-data-microvolt:123description: LVDS diferential output voltage <min max> for data124lanes in microvolts.125maxItems: 2126127allOf:128- if:129properties:130compatible:131contains:132const: ti,sn65dsi83133then:134properties:135ports:136properties:137port@1: false138port@3: false139140- if:141properties:142compatible:143contains:144const: ti,sn65dsi84145then:146properties:147ports:148properties:149port@1: false150151additionalProperties: false152153examples:154- |155#include <dt-bindings/gpio/gpio.h>156157i2c {158#address-cells = <1>;159#size-cells = <0>;160161bridge@2d {162compatible = "ti,sn65dsi83";163reg = <0x2d>;164165enable-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;166vcc-supply = <®_sn65dsi83_1v8>;167168ports {169#address-cells = <1>;170#size-cells = <0>;171172port@0 {173reg = <0>;174175endpoint {176remote-endpoint = <&dsi0_out>;177data-lanes = <1 2 3 4>;178};179};180181port@2 {182reg = <2>;183184endpoint {185remote-endpoint = <&panel_in_lvds>;186};187};188};189};190};191192193