Path: blob/master/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause1%YAML 1.22---3$id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX78maintainers:9- Joy Zou <joy.zou@nxp.com>1011allOf:12- $ref: dma-controller.yaml#1314properties:15compatible:16oneOf:17- items:18- enum:19- fsl,imx50-sdma20- fsl,imx51-sdma21- fsl,imx53-sdma22- fsl,imx6q-sdma23- fsl,imx7d-sdma24- const: fsl,imx35-sdma25- items:26- enum:27- fsl,imx6sx-sdma28- fsl,imx6sl-sdma29- const: fsl,imx6q-sdma30- items:31- const: fsl,imx6ul-sdma32- const: fsl,imx6q-sdma33- const: fsl,imx35-sdma34- items:35- const: fsl,imx6sll-sdma36- const: fsl,imx6ul-sdma37- items:38- const: fsl,imx8mq-sdma39- const: fsl,imx7d-sdma40- items:41- enum:42- fsl,imx8mp-sdma43- fsl,imx8mn-sdma44- fsl,imx8mm-sdma45- const: fsl,imx8mq-sdma46- items:47- enum:48- fsl,imx25-sdma49- fsl,imx31-sdma50- fsl,imx35-sdma51reg:52maxItems: 15354interrupts:55maxItems: 15657fsl,sdma-ram-script-name:58$ref: /schemas/types.yaml#/definitions/string59description: Should contain the full path of SDMA RAM scripts firmware.6061"#dma-cells":62const: 363description: |64The first cell: request/event ID6566The second cell: peripheral types ID67enum:68- MCU domain SSI: 069- Shared SSI: 170- MMC: 271- SDHC: 372- MCU domain UART: 473- Shared UART: 574- FIRI: 675- MCU domain CSPI: 776- Shared CSPI: 877- SIM: 978- ATA: 1079- CCM: 1180- External peripheral: 1281- Memory Stick Host Controller: 1382- Shared Memory Stick Host Controller: 1483- DSP: 1584- Memory: 1685- FIFO type Memory: 1786- SPDIF: 1887- IPU Memory: 1988- ASRC: 2089- ESAI: 2190- SSI Dual FIFO: 2291description: needs firmware more than ver 292- Shared ASRC: 2393- SAI: 2494- Multi SAI: 2595- HDMI Audio: 2696- I2C: 279798The third cell: transfer priority ID99enum:100- High: 0101- Medium: 1102- Low: 2103104gpr:105$ref: /schemas/types.yaml#/definitions/phandle106description: The phandle to the General Purpose Register (GPR) node107108fsl,sdma-event-remap:109$ref: /schemas/types.yaml#/definitions/uint32-matrix110maxItems: 2111items:112items:113- description: GPR register offset114- description: GPR register shift115- description: GPR register value116description: |117Register bits of sdma event remap, the format is <reg shift val>.118The order is <RX>, <TX>.119120clocks:121maxItems: 2122123clock-names:124items:125- const: ipg126- const: ahb127128iram:129$ref: /schemas/types.yaml#/definitions/phandle130description: The phandle to the On-chip RAM (OCRAM) node.131132required:133- compatible134- reg135- interrupts136- fsl,sdma-ram-script-name137138additionalProperties: false139140examples:141- |142sdma: dma-controller@83fb0000 {143compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";144reg = <0x83fb0000 0x4000>;145interrupts = <6>;146#dma-cells = <3>;147fsl,sdma-ram-script-name = "sdma-imx51.bin";148};149150...151152153