Path: blob/master/Documentation/devicetree/bindings/dma/fsl-qdma.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: NXP Layerscape SoC qDMA Controller78maintainers:9- Frank Li <Frank.Li@nxp.com>1011properties:12compatible:13oneOf:14- const: fsl,ls1021a-qdma15- items:16- enum:17- fsl,ls1028a-qdma18- fsl,ls1043a-qdma19- fsl,ls1046a-qdma20- const: fsl,ls1021a-qdma2122reg:23items:24- description: Controller regs25- description: Status regs26- description: Block regs2728interrupts:29minItems: 230maxItems: 53132interrupt-names:33minItems: 234items:35- const: qdma-error36- const: qdma-queue037- const: qdma-queue138- const: qdma-queue239- const: qdma-queue34041dma-channels:42minimum: 143maximum: 644445fsl,dma-queues:46$ref: /schemas/types.yaml#/definitions/uint3247description: Should contain number of queues supported.48minimum: 149maximum: 45051block-number:52$ref: /schemas/types.yaml#/definitions/uint3253description: the virtual block number5455block-offset:56$ref: /schemas/types.yaml#/definitions/uint3257description: the offset of different virtual block5859status-sizes:60$ref: /schemas/types.yaml#/definitions/uint3261description: status queue size of per virtual block6263queue-sizes:64$ref: /schemas/types.yaml#/definitions/uint32-array65description:66command queue size of per virtual block, the size number67based on queues6869big-endian:70$ref: /schemas/types.yaml#/definitions/flag71description:72If present registers and hardware scatter/gather descriptors73of the qDMA are implemented in big endian mode, otherwise in little74mode.7576required:77- compatible78- reg79- interrupts80- interrupt-names81- fsl,dma-queues82- block-number83- block-offset84- status-sizes85- queue-sizes8687allOf:88- $ref: dma-controller.yaml#89- if:90properties:91compatible:92contains:93enum:94- fsl,ls1028a-qdma95- fsl,ls1043a-qdma96- fsl,ls1046a-qdma97then:98properties:99interrupts:100minItems: 5101interrupt-names:102minItems: 5103else:104properties:105interrupts:106maxItems: 3107interrupt-names:108maxItems: 3109110unevaluatedProperties: false111112examples:113- |114#include <dt-bindings/interrupt-controller/arm-gic.h>115116dma-controller@8390000 {117compatible = "fsl,ls1021a-qdma";118reg = <0x8388000 0x1000>, /* Controller regs */119<0x8389000 0x1000>, /* Status regs */120<0x838a000 0x2000>; /* Block regs */121interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,122<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,123<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;124interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1";125#dma-cells = <1>;126dma-channels = <8>;127block-number = <2>;128block-offset = <0x1000>;129status-sizes = <64>;130queue-sizes = <64 64>;131big-endian;132fsl,dma-queues = <2>;133};134135136137