Path: blob/master/Documentation/devicetree/bindings/dma/loongson,ls2k0300-dma.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/dma/loongson,ls2k0300-dma.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Loongson-2 Multi-Channel DMA controller78description:9The Loongson-2 Multi-Channel DMA controller is used for transferring data10between system memory and the peripherals on the APB bus.1112maintainers:13- Binbin Zhou <zhoubinbin@loongson.cn>1415allOf:16- $ref: dma-controller.yaml#1718properties:19compatible:20enum:21- loongson,ls2k0300-dma22- loongson,ls2k3000-dma2324reg:25maxItems: 12627interrupts:28description:29Should contain all of the per-channel DMA interrupts in ascending order30with respect to the DMA channel index.31minItems: 432maxItems: 83334clocks:35maxItems: 13637'#dma-cells':38const: 239description: |40DMA request from clients consists of 2 cells:411. Channel index422. Transfer request factor number, If no transfer factor, use 0.43The number is SoC-specific, and this should be specified with44relation to the device to use the DMA controller.4546dma-channels:47enum: [4, 8]4849required:50- compatible51- reg52- interrupts53- clocks54- '#dma-cells'55- dma-channels5657unevaluatedProperties: false5859examples:60- |61#include <dt-bindings/interrupt-controller/irq.h>62#include <dt-bindings/clock/loongson,ls2k-clk.h>6364dma-controller@1612c000 {65compatible = "loongson,ls2k0300-dma";66reg = <0x1612c000 0xff>;67interrupt-parent = <&liointc0>;68interrupts = <23 IRQ_TYPE_LEVEL_HIGH>,69<24 IRQ_TYPE_LEVEL_HIGH>,70<25 IRQ_TYPE_LEVEL_HIGH>,71<26 IRQ_TYPE_LEVEL_HIGH>,72<27 IRQ_TYPE_LEVEL_HIGH>,73<28 IRQ_TYPE_LEVEL_HIGH>,74<29 IRQ_TYPE_LEVEL_HIGH>,75<30 IRQ_TYPE_LEVEL_HIGH>;76clocks = <&clk LS2K0300_CLK_APB_GATE>;77#dma-cells = <2>;78dma-channels = <8>;79};80...818283