Path: blob/master/Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml
26308 views
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause1%YAML 1.22---3$id: http://devicetree.org/schemas/dma/mediatek,mt7622-hsdma.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: MediaTek High-Speed DMA Controller78maintainers:9- Sean Wang <sean.wang@mediatek.com>1011allOf:12- $ref: dma-controller.yaml#1314properties:15compatible:16enum:17- mediatek,mt7622-hsdma18- mediatek,mt7623-hsdma1920reg:21maxItems: 12223interrupts:24maxItems: 12526clocks:27maxItems: 12829clock-names:30const: hsdma3132power-domains:33maxItems: 13435"#dma-cells":36description: Channel number37const: 13839required:40- reg41- interrupts42- clocks43- clock-names44- power-domains4546unevaluatedProperties: false4748examples:49- |50#include <dt-bindings/clock/mt2701-clk.h>51#include <dt-bindings/interrupt-controller/arm-gic.h>52#include <dt-bindings/power/mt2701-power.h>5354dma-controller@1b007000 {55compatible = "mediatek,mt7623-hsdma";56reg = <0x1b007000 0x1000>;57interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;58clocks = <ðsys CLK_ETHSYS_HSDMA>;59clock-names = "hsdma";60power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;61#dma-cells = <1>;62};636465