Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/dma/qcom,adm.yaml
26308 views
1
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

2
%YAML 1.2

3
---

4
$id: http://devicetree.org/schemas/dma/qcom,adm.yaml#

5
$schema: http://devicetree.org/meta-schemas/core.yaml#

6


7
title: Qualcomm ADM DMA Controller

8


9
maintainers:

10
  - Christian Marangi <ansuelsmth@gmail.com>

11
  - Bjorn Andersson <bjorn.andersson@linaro.org>

12


13
description: |

14
  QCOM ADM DMA controller provides DMA capabilities for

15
  peripheral buses such as NAND and SPI.

16


17
properties:

18
  compatible:

19
    const: qcom,adm

20


21
  reg:

22
    maxItems: 1

23


24
  interrupts:

25
    maxItems: 1

26


27
  "#dma-cells":

28
    const: 1

29


30
  clocks:

31
    items:

32
      - description: phandle to the core clock

33
      - description: phandle to the iface clock

34


35
  clock-names:

36
    items:

37
      - const: core

38
      - const: iface

39


40
  resets:

41
    items:

42
      - description: phandle to the clk reset

43
      - description: phandle to the pbus reset

44
      - description: phandle to the c0 reset

45
      - description: phandle to the c1 reset

46
      - description: phandle to the c2 reset

47


48
  reset-names:

49
    items:

50
      - const: clk

51
      - const: pbus

52
      - const: c0

53
      - const: c1

54
      - const: c2

55


56
  qcom,ee:

57
    $ref: /schemas/types.yaml#/definitions/uint32

58
    description: indicates the security domain identifier used in the secure world.

59
    minimum: 0

60
    maximum: 255

61


62
required:

63
  - compatible

64
  - reg

65
  - interrupts

66
  - "#dma-cells"

67
  - clocks

68
  - clock-names

69
  - resets

70
  - reset-names

71
  - qcom,ee

72


73
additionalProperties: false

74


75
examples:

76
  - |

77
    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>

78
    #include <dt-bindings/reset/qcom,gcc-ipq806x.h>

79


80
    adm_dma: dma-controller@18300000 {

81
        compatible = "qcom,adm";

82
        reg = <0x18300000 0x100000>;

83
        interrupts = <0 170 0>;

84
        #dma-cells = <1>;

85


86
        clocks = <&gcc ADM0_CLK>,

87
                  <&gcc ADM0_PBUS_CLK>;

88
        clock-names = "core", "iface";

89


90
        resets = <&gcc ADM0_RESET>,

91
                  <&gcc ADM0_PBUS_RESET>,

92
                  <&gcc ADM0_C0_RESET>,

93
                  <&gcc ADM0_C1_RESET>,

94
                  <&gcc ADM0_C2_RESET>;

95
        reset-names = "clk", "pbus", "c0", "c1", "c2";

96
        qcom,ee = <0>;

97
    };

98


99
...

100


101