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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/dpll/dpll-pin.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

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%YAML 1.2

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---

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$id: http://devicetree.org/schemas/dpll/dpll-pin.yaml#

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$schema: http://devicetree.org/meta-schemas/core.yaml#

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title: DPLL Pin

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maintainers:

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  - Ivan Vecera <ivecera@redhat.com>

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description: |

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  The DPLL pin is either a physical input or output pin that is provided

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  by a DPLL( Digital Phase-Locked Loop) device. The pin is identified by

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  its physical order number that is stored in reg property and can have

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  an additional set of properties like supported (allowed) frequencies,

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  label, type and may support embedded sync.

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  Note that the pin in this context has nothing to do with pinctrl.

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properties:

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  reg:

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    description: Hardware index of the DPLL pin.

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    maxItems: 1

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  connection-type:

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    description: Connection type of the pin

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    $ref: /schemas/types.yaml#/definitions/string

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    enum: [ext, gnss, int, mux, synce]

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  esync-control:

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    description: Indicates whether the pin supports embedded sync functionality.

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    type: boolean

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  label:

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    description: String exposed as the pin board label

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    $ref: /schemas/types.yaml#/definitions/string

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  supported-frequencies-hz:

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    description: List of supported frequencies for this pin, expressed in Hz.

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required:

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  - reg

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additionalProperties: false

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