Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
torvalds
GitHub Repository: torvalds/linux
Path: blob/master/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
26308 views
1
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
%YAML 1.2
3
---
4
$id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
5
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7
title: NXP i.MX8 DSP core
8
9
maintainers:
10
- Daniel Baluta <daniel.baluta@nxp.com>
11
- Shengjiu Wang <shengjiu.wang@nxp.com>
12
13
description: |
14
Some boards from i.MX8 family contain a DSP core used for
15
advanced pre- and post- audio processing.
16
17
properties:
18
compatible:
19
enum:
20
- fsl,imx8qxp-dsp
21
- fsl,imx8qm-dsp
22
- fsl,imx8mp-dsp
23
- fsl,imx8ulp-dsp
24
- fsl,imx8qxp-hifi4
25
- fsl,imx8qm-hifi4
26
- fsl,imx8mp-hifi4
27
- fsl,imx8ulp-hifi4
28
29
reg:
30
maxItems: 1
31
32
clocks:
33
items:
34
- description: ipg clock
35
- description: ocram clock
36
- description: core clock
37
- description: debug interface clock
38
- description: message unit clock
39
minItems: 3
40
41
clock-names:
42
items:
43
- const: ipg
44
- const: ocram
45
- const: core
46
- const: debug
47
- const: mu
48
minItems: 3
49
50
power-domains:
51
description:
52
List of phandle and PM domain specifier as documented in
53
Documentation/devicetree/bindings/power/power_domain.txt
54
minItems: 1
55
maxItems: 4
56
57
mboxes:
58
description:
59
List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
60
or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB
61
(see mailbox/fsl,mu.txt)
62
minItems: 3
63
maxItems: 4
64
65
mbox-names:
66
minItems: 3
67
maxItems: 4
68
69
memory-region:
70
description:
71
phandle to a node describing reserved memory (System RAM memory)
72
used by DSP (see bindings/reserved-memory/reserved-memory.txt)
73
minItems: 1
74
maxItems: 4
75
76
firmware-name:
77
description: |
78
Default name of the firmware to load to the remote processor.
79
80
fsl,dsp-ctrl:
81
$ref: /schemas/types.yaml#/definitions/phandle
82
description:
83
Phandle to syscon block which provide access for processor enablement
84
85
resets:
86
minItems: 1
87
88
reset-names:
89
minItems: 1
90
items:
91
- const: runstall
92
- const: softreset
93
94
access-controllers:
95
maxItems: 1
96
97
required:
98
- compatible
99
- reg
100
- clocks
101
- clock-names
102
- power-domains
103
- mboxes
104
- mbox-names
105
- memory-region
106
107
allOf:
108
- if:
109
properties:
110
compatible:
111
contains:
112
enum:
113
- fsl,imx8qxp-dsp
114
- fsl,imx8qxp-hifi4
115
then:
116
properties:
117
power-domains:
118
minItems: 2
119
maxItems: 2
120
121
- if:
122
properties:
123
compatible:
124
contains:
125
enum:
126
- fsl,imx8qm-dsp
127
- fsl,imx8qm-hifi4
128
then:
129
properties:
130
power-domains:
131
minItems: 4
132
133
- if:
134
properties:
135
compatible:
136
contains:
137
enum:
138
- fsl,imx8mp-dsp
139
- fsl,imx8mp-hifi4
140
- fsl,imx8ulp-dsp
141
- fsl,imx8ulp-hifi4
142
then:
143
properties:
144
power-domains:
145
maxItems: 1
146
147
- if:
148
properties:
149
compatible:
150
contains:
151
enum:
152
- fsl,imx8qxp-hifi4
153
- fsl,imx8qm-hifi4
154
- fsl,imx8mp-hifi4
155
- fsl,imx8ulp-hifi4
156
then:
157
properties:
158
memory-region:
159
minItems: 4
160
mboxes:
161
maxItems: 3
162
mbox-names:
163
items:
164
- const: tx
165
- const: rx
166
- const: rxdb
167
else:
168
properties:
169
memory-region:
170
maxItems: 1
171
mboxes:
172
minItems: 4
173
mbox-names:
174
items:
175
- const: txdb0
176
- const: txdb1
177
- const: rxdb0
178
- const: rxdb1
179
- if:
180
properties:
181
compatible:
182
contains:
183
enum:
184
- fsl,imx8mp-dsp
185
- fsl,imx8mp-hifi4
186
then:
187
required:
188
- resets
189
- reset-names
190
191
additionalProperties: false
192
193
examples:
194
- |
195
#include <dt-bindings/firmware/imx/rsrc.h>
196
#include <dt-bindings/clock/imx8-clock.h>
197
dsp@596e8000 {
198
compatible = "fsl,imx8qxp-dsp";
199
reg = <0x596e8000 0x88000>;
200
clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
201
<&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
202
<&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
203
clock-names = "ipg", "ocram", "core";
204
power-domains = <&pd IMX_SC_R_MU_13B>,
205
<&pd IMX_SC_R_MU_2A>;
206
mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
207
mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
208
memory-region = <&dsp_reserved>;
209
};
210
- |
211
#include <dt-bindings/clock/imx8mp-clock.h>
212
#include <dt-bindings/reset/imx8mp-reset-audiomix.h>
213
dsp_reserved: dsp@92400000 {
214
reg = <0x92400000 0x1000000>;
215
no-map;
216
};
217
dsp_vdev0vring0: vdev0vring0@942f0000 {
218
reg = <0x942f0000 0x8000>;
219
no-map;
220
};
221
dsp_vdev0vring1: vdev0vring1@942f8000 {
222
reg = <0x942f8000 0x8000>;
223
no-map;
224
};
225
dsp_vdev0buffer: vdev0buffer@94300000 {
226
compatible = "shared-dma-pool";
227
reg = <0x94300000 0x100000>;
228
no-map;
229
};
230
231
dsp: dsp@3b6e8000 {
232
compatible = "fsl,imx8mp-hifi4";
233
reg = <0x3b6e8000 0x88000>;
234
clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
235
<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>,
236
<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>,
237
<&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>;
238
clock-names = "ipg", "ocram", "core", "debug";
239
firmware-name = "imx/dsp/hifi4.bin";
240
power-domains = <&audiomix_pd>;
241
mbox-names = "tx", "rx", "rxdb";
242
mboxes = <&mu2 0 0>,
243
<&mu2 1 0>,
244
<&mu2 3 0>;
245
memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
246
<&dsp_vdev0vring1>, <&dsp_reserved>;
247
resets = <&audio_blk_ctrl IMX8MP_AUDIOMIX_DSP_RUNSTALL>;
248
reset-names = "runstall";
249
};
250
251