Path: blob/master/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml
26308 views
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: MediaTek mt8186 DSP core78maintainers:9- Tinghan Shen <tinghan.shen@mediatek.com>1011description: |12MediaTek mt8186 SoC contains a DSP core used for13advanced pre- and post- audio processing.1415properties:16compatible:17enum:18- mediatek,mt8186-dsp19- mediatek,mt8188-dsp2021reg:22items:23- description: Address and size of the DSP config registers24- description: Address and size of the DSP SRAM25- description: Address and size of the DSP secure registers26- description: Address and size of the DSP bus registers2728reg-names:29items:30- const: cfg31- const: sram32- const: sec33- const: bus3435clocks:36items:37- description: mux for audio dsp clock38- description: mux for audio dsp local bus3940clock-names:41items:42- const: audiodsp43- const: adsp_bus4445power-domains:46maxItems: 14748mboxes:49items:50- description: mailbox for receiving audio DSP requests.51- description: mailbox for transmitting requests to audio DSP.5253mbox-names:54items:55- const: rx56- const: tx5758memory-region:59items:60- description: dma buffer between host and DSP.61- description: DSP system memory.6263required:64- compatible65- reg66- reg-names67- clocks68- clock-names69- power-domains70- mbox-names71- mboxes7273additionalProperties: false7475examples:76- |77#include <dt-bindings/clock/mt8186-clk.h>78dsp@10680000 {79compatible = "mediatek,mt8186-dsp";80reg = <0x10680000 0x2000>,81<0x10800000 0x100000>,82<0x1068b000 0x100>,83<0x1068f000 0x1000>;84reg-names = "cfg", "sram", "sec", "bus";85clocks = <&topckgen CLK_TOP_AUDIODSP>,86<&topckgen CLK_TOP_ADSP_BUS>;87clock-names = "audiodsp",88"adsp_bus";89power-domains = <&spm 6>;90mbox-names = "rx", "tx";91mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;92};939495