Path: blob/master/Documentation/devicetree/bindings/dvfs/performance-domain.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Generic performance domains78maintainers:9- Sudeep Holla <sudeep.holla@arm.com>1011description: |+12This binding is intended for performance management of groups of devices or13CPUs that run in the same performance domain. Performance domains must not14be confused with power domains. A performance domain is defined by a set15of devices that always have to run at the same performance level. For a given16performance domain, there is a single point of control that affects all the17devices in the domain, making it impossible to set the performance level of18an individual device in the domain independently from other devices in19that domain. For example, a set of CPUs that share a voltage domain, and20have a common frequency control, is said to be in the same performance21domain.2223This device tree binding can be used to bind performance domain consumer24devices with their performance domains provided by performance domain25providers. A performance domain provider can be represented by any node in26the device tree and can provide one or more performance domains. A consumer27node can refer to the provider by a phandle and a set of phandle arguments28(so called performance domain specifiers) of length specified by the29\#performance-domain-cells property in the performance domain provider node.3031select: true3233properties:34"#performance-domain-cells":35description:36Number of cells in a performance domain specifier. Typically 0 for nodes37representing a single performance domain and 1 for nodes providing38multiple performance domains (e.g. performance controllers), but can be39any value as specified by device tree binding documentation of particular40provider.41enum: [ 0, 1 ]4243performance-domains:44$ref: /schemas/types.yaml#/definitions/phandle-array45description:46A phandle and performance domain specifier as defined by bindings of the47performance controller/provider specified by phandle.4849additionalProperties: true5051examples:52- |53soc {54#address-cells = <2>;55#size-cells = <2>;5657performance: performance-controller@11bc00 {58compatible = "mediatek,cpufreq-hw";59reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;6061#performance-domain-cells = <1>;62};63};6465// The node above defines a performance controller that is a performance66// domain provider and expects one cell as its phandle argument.6768cpus {69#address-cells = <2>;70#size-cells = <0>;7172cpu@0 {73device_type = "cpu";74compatible = "arm,cortex-a57";75reg = <0x0 0x0>;76performance-domains = <&performance 1>;77};78};798081