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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

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# Copyright (C) 2025 Altera Corporation

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%YAML 1.2

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---

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$id: http://devicetree.org/schemas/edac/altr,socfpga-ecc-manager.yaml#

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$schema: http://devicetree.org/meta-schemas/core.yaml#

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title: Altera SoCFPGA ECC Manager

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maintainers:

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  - Matthew Gerlach <matthew.gerlach@altera.com>

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description:

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  This binding describes the device tree nodes required for the Altera SoCFPGA

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  ECC Manager for the Cyclone5, Arria5, Arria10, Stratix10, and Agilex chip

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  families.

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properties:

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  compatible:

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    oneOf:

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      - items:

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          - const: altr,socfpga-s10-ecc-manager

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          - const: altr,socfpga-a10-ecc-manager

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      - const: altr,socfpga-a10-ecc-manager

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      - const: altr,socfpga-ecc-manager

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  "#address-cells":

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    const: 1

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  "#size-cells":

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    const: 1

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  interrupts:

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    minItems: 1

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    maxItems: 2

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  interrupt-controller: true

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  "#interrupt-cells":

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    const: 2

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  ranges: true

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  altr,sysmgr-syscon:

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    $ref: /schemas/types.yaml#/definitions/phandle

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    description: phandle to Stratix10 System Manager Block with the ECC manager registers

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  sdramedac:

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    type: object

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    additionalProperties: false

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    properties:

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      compatible:

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        enum:

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          - altr,sdram-edac-a10

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          - altr,sdram-edac-s10

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      interrupts:

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        minItems: 1

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        maxItems: 2

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      altr,sdr-syscon:

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        $ref: /schemas/types.yaml#/definitions/phandle

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        description: phandle to SDRAM parent

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    required:

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      - compatible

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      - interrupts

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      - altr,sdr-syscon

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patternProperties:

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  "^ocram-ecc@[a-f0-9]+$":

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    type: object

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    additionalProperties: false

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    properties:

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      compatible:

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        oneOf:

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          - items:

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              - const: altr,socfpga-s10-ocram-ecc

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              - const: altr,socfpga-a10-ocram-ecc

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          - const: altr,socfpga-a10-ocram-ecc

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          - const: altr,socfpga-ocram-ecc

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      reg:

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        maxItems: 1

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      interrupts:

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        minItems: 1

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        maxItems: 2

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      iram:

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        $ref: /schemas/types.yaml#/definitions/phandle

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        description: phandle to OCRAM parent

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      altr,ecc-parent:

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        $ref: /schemas/types.yaml#/definitions/phandle

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        description: phandle to OCRAM parent

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    required:

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      - compatible

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      - reg

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      - interrupts

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  "^usb[0-9]-ecc@[a-f0-9]+$":

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    type: object

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    additionalProperties: false

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    properties:

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      compatible:

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        oneOf:

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          - items:

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              - const: altr,socfpga-s10-usb-ecc

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              - const: altr,socfpga-usb-ecc

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          - const: altr,socfpga-usb-ecc

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      reg:

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        maxItems: 1

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      interrupts:

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        minItems: 1

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        maxItems: 2

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      altr,ecc-parent:

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        $ref: /schemas/types.yaml#/definitions/phandle

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        description: phandle to USB parent

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    required:

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      - compatible

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      - reg

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      - interrupts

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      - altr,ecc-parent

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  "^emac[0-9]-[t,r]x-ecc@[a-f0-9]+$":

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    type: object

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    additionalProperties: false

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    properties:

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      compatible:

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        oneOf:

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          - items:

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              - const: altr,socfpga-s10-eth-mac-ecc

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              - const: altr,socfpga-eth-mac-ecc

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          - const: altr,socfpga-eth-mac-ecc

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      reg:

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        maxItems: 1

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      interrupts:

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        minItems: 1

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        maxItems: 2

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      altr,ecc-parent:

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        $ref: /schemas/types.yaml#/definitions/phandle

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        description: phandle to ethernet parent

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    required:

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      - compatible

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      - reg

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      - interrupts

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      - altr,ecc-parent

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  "^sdmmc[a-f]-ecc@[a-f0-9]+$":

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    type: object

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    additionalProperties: false

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    properties:

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      compatible:

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        oneOf:

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          - items:

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              - const: altr,socfpga-s10-sdmmc-ecc

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              - const: altr,socfpga-sdmmc-ecc

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          - const: altr,socfpga-sdmmc-ecc

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      reg:

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        maxItems: 1

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      interrupts:

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        minItems: 2

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        maxItems: 4

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      altr,ecc-parent:

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        $ref: /schemas/types.yaml#/definitions/phandle

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        description: phandle to SD/MMC parent

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    required:

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      - compatible

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      - reg

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      - interrupts

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      - altr,ecc-parent

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  "^l2-ecc@[a-f0-9]+$":

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    type: object

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    additionalProperties: false

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    properties:

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      compatible:

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        enum:

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          - altr,socfpga-a10-l2-ecc

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          - altr,socfpga-l2-ecc

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      reg:

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        maxItems: 1

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      interrupts:

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        maxItems: 2

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    required:

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      - compatible

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      - reg

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      - interrupts

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  "^dma-ecc@[a-f0-9]+$":

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    type: object

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    additionalProperties: false

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    properties:

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      compatible:

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        const: altr,socfpga-dma-ecc

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      reg:

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        maxItems: 1

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      interrupts:

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        maxItems: 2

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      altr,ecc-parent:

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        $ref: /schemas/types.yaml#/definitions/phandle

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        description: phandle to SD/MMC parent

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    required:

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      - compatible

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      - reg

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      - interrupts

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      - altr,ecc-parent

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if:

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  properties:

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    compatible:

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      contains:

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        const: altr,socfpga-ecc-manager

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then:

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  required:

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    - compatible

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    - "#address-cells"

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    - "#size-cells"

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    - ranges

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else:

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  required:

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    - compatible

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    - "#address-cells"

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    - "#size-cells"

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    - interrupts

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    - interrupt-controller

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    - "#interrupt-cells"

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    - ranges

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    - altr,sysmgr-syscon

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additionalProperties: false

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examples:

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  - |

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    #include <dt-bindings/interrupt-controller/arm-gic.h>

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    #include <dt-bindings/interrupt-controller/irq.h>

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    eccmgr {

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        compatible = "altr,socfpga-s10-ecc-manager",

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                     "altr,socfpga-a10-ecc-manager";

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        altr,sysmgr-syscon = <&sysmgr>;

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        #address-cells = <1>;

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        #size-cells = <1>;

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        interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;

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        interrupt-controller;

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        #interrupt-cells = <2>;

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        ranges;

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        sdramedac {

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            compatible = "altr,sdram-edac-s10";

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            altr,sdr-syscon = <&sdr>;

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            interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;

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        };

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        ocram-ecc@ff8cc000 {

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            compatible = "altr,socfpga-s10-ocram-ecc",

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                         "altr,socfpga-a10-ocram-ecc";

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            reg = <0xff8cc000 0x100>;

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            altr,ecc-parent = <&ocram>;

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            interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;

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        };

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        usb0-ecc@ff8c4000 {

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            compatible = "altr,socfpga-s10-usb-ecc",

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                         "altr,socfpga-usb-ecc";

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            reg = <0xff8c4000 0x100>;

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            altr,ecc-parent = <&usb0>;

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            interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;

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        };

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        emac0-rx-ecc@ff8c0000 {

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            compatible = "altr,socfpga-s10-eth-mac-ecc",

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                         "altr,socfpga-eth-mac-ecc";

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            reg = <0xff8c0000 0x100>;

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            altr,ecc-parent = <&gmac0>;

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            interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;

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        };

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        emac0-tx-ecc@ff8c0400 {

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            compatible = "altr,socfpga-s10-eth-mac-ecc",

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                         "altr,socfpga-eth-mac-ecc";

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            reg = <0xff8c0400 0x100>;

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            altr,ecc-parent = <&gmac0>;

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            interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;

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        };

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        sdmmca-ecc@ff8c8c00 {

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            compatible = "altr,socfpga-s10-sdmmc-ecc",

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                         "altr,socfpga-sdmmc-ecc";

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            reg = <0xff8c8c00 0x100>;

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            altr,ecc-parent = <&mmc>;

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            interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,

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                         <15 IRQ_TYPE_LEVEL_HIGH>;

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        };

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    };

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