Path: blob/master/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml
53746 views
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/edac/apm,xgene-edac.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: APM X-Gene SoC EDAC78maintainers:9- Khuong Dinh <khuong@os.amperecomputing.com>1011description: >12EDAC node is defined to describe on-chip error detection and correction.1314The following error types are supported:1516memory controller - Memory controller17PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache18L3 - L3 cache controller19SoC - SoC IPs such as Ethernet, SATA, etc2021properties:22compatible:23const: apm,xgene-edac2425reg:26items:27- description: CPU bus (PCP) resource2829'#address-cells':30const: 23132'#size-cells':33const: 23435ranges: true3637interrupts:38description: Interrupt-specifier for MCU, PMD, L3, or SoC error IRQ(s).39items:40- description: MCU error IRQ41- description: PMD error IRQ42- description: L3 error IRQ43- description: SoC error IRQ44minItems: 14546regmap-csw:47description: Regmap of the CPU switch fabric (CSW) resource.48$ref: /schemas/types.yaml#/definitions/phandle4950regmap-mcba:51description: Regmap of the MCB-A (memory bridge) resource.52$ref: /schemas/types.yaml#/definitions/phandle5354regmap-mcbb:55description: Regmap of the MCB-B (memory bridge) resource.56$ref: /schemas/types.yaml#/definitions/phandle5758regmap-efuse:59description: Regmap of the PMD efuse resource.60$ref: /schemas/types.yaml#/definitions/phandle6162regmap-rb:63description: Regmap of the register bus resource (optional for compatibility).64$ref: /schemas/types.yaml#/definitions/phandle6566required:67- compatible68- regmap-csw69- regmap-mcba70- regmap-mcbb71- regmap-efuse72- reg73- interrupts7475# Child-node bindings76patternProperties:77'^edacmc@':78description: Memory controller subnode79type: object80additionalProperties: false8182properties:83compatible:84const: apm,xgene-edac-mc8586reg:87maxItems: 18889memory-controller:90description: Instance number of the memory controller.91$ref: /schemas/types.yaml#/definitions/uint3292maximum: 39394required:95- compatible96- reg97- memory-controller9899'^edacpmd@':100description: PMD subnode101type: object102additionalProperties: false103104properties:105compatible:106const: apm,xgene-edac-pmd107108reg:109maxItems: 1110111pmd-controller:112description: Instance number of the PMD controller.113$ref: /schemas/types.yaml#/definitions/uint32114maximum: 3115116required:117- compatible118- reg119- pmd-controller120121'^edacl3@':122description: L3 subnode123type: object124additionalProperties: false125126properties:127compatible:128enum:129- apm,xgene-edac-l3130- apm,xgene-edac-l3-v2131132reg:133maxItems: 1134135required:136- compatible137- reg138139'^edacsoc@':140description: SoC subnode141type: object142additionalProperties: false143144properties:145compatible:146enum:147- apm,xgene-edac-soc148- apm,xgene-edac-soc-v1149150reg:151maxItems: 1152153required:154- compatible155- reg156157additionalProperties: false158159examples:160- |161bus {162#address-cells = <2>;163#size-cells = <2>;164165edac@78800000 {166compatible = "apm,xgene-edac";167reg = <0x0 0x78800000 0x0 0x100>;168#address-cells = <2>;169#size-cells = <2>;170ranges;171interrupts = <0x0 0x20 0x4>, <0x0 0x21 0x4>, <0x0 0x27 0x4>;172173regmap-csw = <&csw>;174regmap-mcba = <&mcba>;175regmap-mcbb = <&mcbb>;176regmap-efuse = <&efuse>;177regmap-rb = <&rb>;178179edacmc@7e800000 {180compatible = "apm,xgene-edac-mc";181reg = <0x0 0x7e800000 0x0 0x1000>;182memory-controller = <0>;183};184185edacpmd@7c000000 {186compatible = "apm,xgene-edac-pmd";187reg = <0x0 0x7c000000 0x0 0x200000>;188pmd-controller = <0>;189};190191edacl3@7e600000 {192compatible = "apm,xgene-edac-l3";193reg = <0x0 0x7e600000 0x0 0x1000>;194};195196edacsoc@7e930000 {197compatible = "apm,xgene-edac-soc-v1";198reg = <0x0 0x7e930000 0x0 0x1000>;199};200};201};202203204