Path: blob/master/Documentation/devicetree/bindings/firmware/arm,scpi.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)1# Copyright 2021 ARM Ltd.2%YAML 1.23---4$id: http://devicetree.org/schemas/firmware/arm,scpi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#67title: System Control and Power Interface (SCPI) Message Protocol89maintainers:10- Sudeep Holla <sudeep.holla@arm.com>1112description: |13Firmware implementing the SCPI described in ARM document number ARM DUI140922B ("ARM Compute Subsystem SCP: Message Interface Protocols")[0] can be15used by Linux to initiate various system control and power operations.1617This binding is intended to define the interface the firmware implementing18the SCPI provide for OSPM in the device tree.1920[0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html2122properties:23$nodename:24const: scpi2526compatible:27description:28SCPI compliant firmware complying to SCPI v1.0 and above OR29SCPI compliant firmware complying to all unversioned releases30prior to SCPI v1.031oneOf:32- const: arm,scpi # SCPI v1.0 and above33- const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.034- items:35- enum:36- amlogic,meson-gxbb-scpi37- const: arm,scpi-pre-1.03839mboxes:40description:41List of phandle and mailbox channel specifiers. All the channels reserved42by remote SCP firmware for use by SCPI message protocol should be43specified in any order.44minItems: 145maxItems: 44647shmem:48description:49List of phandle pointing to the shared memory(SHM) area between the50processors using these mailboxes for IPC, one for each mailbox SHM can51be any memory reserved for the purpose of this communication between the52processors.53minItems: 154maxItems: 45556power-controller:57type: object58description:59This sub-node represents SCPI power domain controller.6061properties:62compatible:63const: arm,scpi-power-domains6465'#power-domain-cells':66const: 16768num-domains:69$ref: /schemas/types.yaml#/definitions/uint3270description:71Total number of power domains provided by SCPI. This is needed as72the SCPI message protocol lacks a mechanism to query this73information at runtime.7475required:76- compatible77- '#power-domain-cells'78- num-domains7980additionalProperties: false8182sensors:83type: object84description: |85This sub-node represents SCPI sensors controller.8687properties:88compatible:89oneOf:90- const: arm,scpi-sensors91- items:92- enum:93- amlogic,meson-gxbb-scpi-sensors94- const: arm,scpi-sensors9596'#thermal-sensor-cells':97const: 19899required:100- compatible101- '#thermal-sensor-cells'102103additionalProperties: false104105clocks:106type: object107description:108This is the container node. Each sub-node represents one of the types109of clock controller - indexed or full range.110111properties:112compatible:113const: arm,scpi-clocks114115patternProperties:116"^clocks-[0-9a-f]+$":117type: object118description: |119This sub-node represents one of the types of clock controller120- indexed or full range.121122"arm,scpi-dvfs-clocks" - all the clocks that are variable and index123based. These clocks don't provide an entire range of values between124the limits but only discrete points within the range. The firmware125provides the mapping for each such operating frequency and the index126associated with it. The firmware also manages the voltage scaling127appropriately with the clock scaling.128129"arm,scpi-variable-clocks" - all the clocks that are variable and130provide full range within the specified range. The firmware provides131the range of values within a specified range.132133properties:134compatible:135enum:136- arm,scpi-dvfs-clocks137- arm,scpi-variable-clocks138139'#clock-cells':140const: 1141142clock-output-names: true143144clock-indices:145$ref: /schemas/types.yaml#/definitions/uint32-array146description:147The identifying number for the clocks(i.e.clock_id) in the node.148It can be non linear and hence provide the mapping of identifiers149into the clock-output-names array.150151required:152- compatible153- '#clock-cells'154- clock-output-names155- clock-indices156157additionalProperties: false158159required:160- compatible161162additionalProperties: false163164additionalProperties: false165166required:167- compatible168- mboxes169- shmem170171examples:172- |173firmware {174scpi {175compatible = "arm,scpi";176mboxes = <&mhuA 1>;177shmem = <&cpu_scp_hpri>; /* HP-NonSecure */178179scpi_devpd: power-controller {180compatible = "arm,scpi-power-domains";181num-domains = <2>;182#power-domain-cells = <1>;183};184185clocks {186compatible = "arm,scpi-clocks";187188scpi_dvfs: clocks-0 {189compatible = "arm,scpi-dvfs-clocks";190#clock-cells = <1>;191clock-indices = <0>, <1>, <2>;192clock-output-names = "atlclk", "aplclk","gpuclk";193};194195scpi_clk: clocks-1 {196compatible = "arm,scpi-variable-clocks";197#clock-cells = <1>;198clock-indices = <3>, <4>;199clock-output-names = "pxlclk0", "pxlclk1";200};201};202203scpi_sensors: sensors {204compatible = "arm,scpi-sensors";205#thermal-sensor-cells = <1>;206};207208};209};210211soc {212#address-cells = <2>;213#size-cells = <2>;214215sram@50000000 {216compatible = "mmio-sram";217reg = <0x0 0x50000000 0x0 0x10000>;218219#address-cells = <1>;220#size-cells = <1>;221ranges = <0 0x0 0x50000000 0x10000>;222223cpu_scp_lpri: scp-sram-section@0 {224compatible = "arm,scp-shmem";225reg = <0x0 0x200>;226};227228cpu_scp_hpri: scp-sram-section@200 {229compatible = "arm,scp-shmem";230reg = <0x200 0x200>;231};232};233};234235- |236firmware {237scpi {238compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";239mboxes = <&mailbox 1>, <&mailbox 2>;240shmem = <&cpu_scp_lpri>, <&cpu_scp_hpri>;241242scpi_sensors1: sensors {243compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";244#thermal-sensor-cells = <1>;245};246};247};248...249250251