Path: blob/master/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)1# Copyright 2024 NXP2%YAML 1.23---4$id: http://devicetree.org/schemas/firmware/nxp,imx95-scmi-pinctrl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#67title: i.MX System Control and Management Interface (SCMI) Pinctrl Protocol89maintainers:10- Peng Fan <peng.fan@nxp.com>1112allOf:13- $ref: /schemas/pinctrl/pinctrl.yaml1415patternProperties:16'grp$':17type: object18description:19Pinctrl node's client devices use subnodes for desired pin configuration.20Client device subnodes use below standard properties.2122unevaluatedProperties: false2324properties:25fsl,pins:26description:27each entry consists of 6 integers and represents the mux and config28setting for one pin. The first 5 integers <mux_reg conf_reg input_reg29mux_val input_val> are specified using a PIN_FUNC_ID macro, which can30be found in <arch/arm64/boot/dts/freescale/imx95-pinfunc.h>. The last31integer CONFIG is the pad setting value like pull-up on this pin.32Please refer to i.MX95 Reference Manual for detailed CONFIG settings.33$ref: /schemas/types.yaml#/definitions/uint32-matrix34items:35items:36- description: |37"mux_reg" indicates the offset of mux register.38- description: |39"conf_reg" indicates the offset of pad configuration register.40- description: |41"input_reg" indicates the offset of select input register.42- description: |43"mux_val" indicates the mux value to be applied.44- description: |45"input_val" indicates the select input value to be applied.46- description: |47"pad_setting" indicates the pad configuration value to be applied.4849required:50- fsl,pins5152additionalProperties: true535455