Path: blob/master/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Xilinx Zynq Ultrascale MPSoC FPGA Manager78maintainers:9- Nava kishore Manne <nava.kishore.manne@amd.com>1011description: |12Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.13The ZynqMP SoC uses the PCAP (Processor Configuration Port) to14configure the Programmable Logic (PL). The configuration uses the15firmware interface.1617properties:18compatible:19const: xlnx,zynqmp-pcap-fpga2021required:22- compatible2324additionalProperties: false2526examples:27- |28firmware {29zynqmp_firmware: zynqmp-firmware {30zynqmp_pcap: pcap {31compatible = "xlnx,zynqmp-pcap-fpga";32};33};34};35...363738