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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/fsi/aspeed,ast2600-fsi-master.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

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%YAML 1.2

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---

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$id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#

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$schema: http://devicetree.org/meta-schemas/core.yaml#

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title: Aspeed FSI master

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maintainers:

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  - Eddie James <eajames@linux.ibm.com>

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description:

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  The AST2600 and later contain two identical FSI masters. They share a

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  clock and have a separate interrupt line and output pins.

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properties:

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  compatible:

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    enum:

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      - aspeed,ast2600-fsi-master

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      - aspeed,ast2700-fsi-master

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  clocks:

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    maxItems: 1

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  cfam-reset-gpios:

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    maxItems: 1

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    description:

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      Output GPIO pin for CFAM reset

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  fsi-routing-gpios:

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    maxItems: 1

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    description:

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      Output GPIO pin for setting the FSI mux (internal or cabled)

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  fsi-mux-gpios:

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    maxItems: 1

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    description:

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      Input GPIO pin for detecting the desired FSI mux state

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  interrupts:

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    maxItems: 1

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if:

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  properties:

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    compatible:

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      contains:

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        enum:

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          - aspeed,ast2600-fsi-master

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then:

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  properties:

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    reg:

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      maxItems: 1

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else:

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  properties:

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    reg:

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      minItems: 1

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      items:

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        - description: OPB control registers

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        - description: FSI controller registers

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        - description: FSI link address space

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    reg-names:

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      items:

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        - const: opb

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        - const: ctrl

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        - const: fsi

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required:

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  - compatible

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  - reg

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  - clocks

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  - interrupts

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allOf:

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  - $ref: fsi-controller.yaml#

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unevaluatedProperties: false

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examples:

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  - |

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    #include <dt-bindings/clock/ast2600-clock.h>

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    #include <dt-bindings/gpio/aspeed-gpio.h>

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    #include <dt-bindings/interrupt-controller/arm-gic.h>

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    fsi-master@1e79b000 {

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        compatible = "aspeed,ast2600-fsi-master";

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        reg = <0x1e79b000 0x94>;

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        #address-cells = <2>;

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        #size-cells = <0>;

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        interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;

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        pinctrl-names = "default";

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        pinctrl-0 = <&pinctrl_fsi1_default>;

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        clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;

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        fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;

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        fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;

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        cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;

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        cfam@0,0 {

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            reg = <0 0>;

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            #address-cells = <1>;

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            #size-cells = <1>;

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            chip-id = <0>;

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        };

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    };

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  - |

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    bus {

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        #address-cells = <2>;

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        #size-cells = <2>;

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        fsi-master@21800000 {

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            compatible = "aspeed,ast2700-fsi-master";

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            reg = <0x0 0x21800000 0x0 0x100>,

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                  <0x0 0x21000000 0x0 0x1000>,

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                  <0x0 0x20000000 0x0 0x1000000>;

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            reg-names = "opb", "ctrl", "fsi";

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            #interrupt-cells = <1>;

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            interrupt-controller;

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            interrupts-extended = <&intc 6>;

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            pinctrl-names = "default";

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            pinctrl-0 = <&pinctrl_fsi0_default>;

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            clocks = <&syscon 40>;

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        };

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    };

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