Path: blob/master/Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause1%YAML 1.22---3$id: http://devicetree.org/schemas/gpio/brcm,kona-gpio.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Broadcom Kona family GPIO controller78description:9The Broadcom GPIO Controller IP can be configured prior to synthesis to10support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The11GPIO controller only supports edge, not level, triggering of interrupts.1213maintainers:14- Ray Jui <rjui@broadcom.com>1516properties:17compatible:18items:19- enum:20- brcm,bcm11351-gpio21- brcm,bcm21664-gpio22- brcm,bcm23550-gpio23- const: brcm,kona-gpio2425reg:26maxItems: 12728interrupts:29minItems: 430maxItems: 631description:32The interrupt outputs from the controller. There is one GPIO interrupt33per GPIO bank. The number of interrupts listed depends on the number of34GPIO banks on the SoC. The interrupts must be ordered by bank, starting35with bank 0. There is always a 1:1 mapping between banks and IRQs.3637'#gpio-cells':38const: 23940'#interrupt-cells':41const: 24243gpio-controller: true4445interrupt-controller: true4647required:48- compatible49- reg50- interrupts51- '#gpio-cells'52- '#interrupt-cells'53- gpio-controller54- interrupt-controller5556allOf:57- if:58properties:59compatible:60contains:61const: brcm,bcm11351-gpio62then:63properties:64interrupts:65minItems: 666- if:67properties:68compatible:69contains:70enum:71- brcm,bcm21664-gpio72- brcm,bcm23550-gpio73then:74properties:75interrupts:76maxItems: 47778additionalProperties: false7980examples:81- |82#include <dt-bindings/interrupt-controller/arm-gic.h>83#include <dt-bindings/interrupt-controller/irq.h>8485gpio@35003000 {86compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";87reg = <0x35003000 0x800>;88interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,89<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,90<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,91<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,92<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,93<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;94#gpio-cells = <2>;95#interrupt-cells = <2>;96gpio-controller;97interrupt-controller;98};99...100101102