Path: blob/master/Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/gpio/intel,ixp4xx-gpio.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Intel IXP4xx XScale Networking Processors GPIO Controller78description: |9This GPIO controller is found in the Intel IXP4xx10processors. It supports 16 GPIO lines.11The interrupt portions of the GPIO controller is hierarchical.12The synchronous edge detector is part of the GPIO block, but the13actual enabling/disabling of the interrupt line is done in the14main IXP4xx interrupt controller which has a 1-to-1 mapping for15the first 12 GPIO lines to 12 system interrupts.16The remaining 4 GPIO lines can not be used for receiving17interrupts.18The interrupt parent of this GPIO controller must be the19IXP4xx interrupt controller.20GPIO 14 and 15 can be used as clock outputs rather than GPIO,21and this can be enabled by a special flag.2223maintainers:24- Linus Walleij <linus.walleij@linaro.org>2526properties:27compatible:28const: intel,ixp4xx-gpio2930reg:31maxItems: 13233gpio-controller: true3435"#gpio-cells":36const: 23738interrupt-controller: true3940"#interrupt-cells":41const: 24243intel,ixp4xx-gpio14-clkout:44description: If defined, enables clock output on GPIO 1445instead of GPIO.46type: boolean4748intel,ixp4xx-gpio15-clkout:49description: If defined, enables clock output on GPIO 1550instead of GPIO.51type: boolean5253required:54- compatible55- reg56- "#gpio-cells"57- interrupt-controller58- "#interrupt-cells"5960additionalProperties: false6162examples:63- |64#include <dt-bindings/interrupt-controller/irq.h>65gpio@c8004000 {66compatible = "intel,ixp4xx-gpio";67reg = <0xc8004000 0x1000>;68gpio-controller;69#gpio-cells = <2>;70interrupt-controller;71#interrupt-cells = <2>;72};737475