Path: blob/master/Documentation/devicetree/bindings/gpu/aspeed-gfx.txt
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Device tree configuration for the GFX display device on the ASPEED SoCs12Required properties:3- compatible4* Must be one of the following:5+ aspeed,ast2500-gfx6+ aspeed,ast2400-gfx7* In addition, the ASPEED pinctrl bindings require the 'syscon' property to8be present910- reg: Physical base address and length of the GFX registers1112- interrupts: interrupt number for the GFX device1314- clocks: clock number used to generate the pixel clock1516- resets: reset line that must be released to use the GFX device1718- memory-region:19Phandle to a memory region to allocate from, as defined in20Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt212223Example:2425gfx: display@1e6e6000 {26compatible = "aspeed,ast2500-gfx", "syscon";27reg = <0x1e6e6000 0x1000>;28reg-io-width = <4>;29clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;30resets = <&syscon ASPEED_RESET_CRT1>;31interrupts = <0x19>;32memory-region = <&gfx_memory>;33};3435gfx_memory: framebuffer {36size = <0x01000000>;37alignment = <0x01000000>;38compatible = "shared-dma-pool";39reusable;40};414243