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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra234-nvdec.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

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%YAML 1.2

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---

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$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#

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$schema: http://devicetree.org/meta-schemas/core.yaml#

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title: NVIDIA Tegra234 NVDEC

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description: |

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  NVDEC is the hardware video decoder present on NVIDIA Tegra210

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  and newer chips. It is located on the Host1x bus and typically

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  programmed through Host1x channels.

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maintainers:

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  - Thierry Reding <treding@gmail.com>

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  - Mikko Perttunen <mperttunen@nvidia.com>

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properties:

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  $nodename:

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    pattern: "^nvdec@[0-9a-f]*$"

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  compatible:

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    enum:

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      - nvidia,tegra234-nvdec

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  reg:

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    maxItems: 1

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  clocks:

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    maxItems: 3

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  clock-names:

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    items:

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      - const: nvdec

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      - const: fuse

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      - const: tsec_pka

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  resets:

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    maxItems: 1

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  reset-names:

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    items:

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      - const: nvdec

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  power-domains:

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    maxItems: 1

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  iommus:

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    maxItems: 1

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  dma-coherent: true

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  interconnects:

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    items:

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      - description: DMA read memory client

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      - description: DMA write memory client

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  interconnect-names:

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    items:

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      - const: dma-mem

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      - const: write

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  nvidia,memory-controller:

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    $ref: /schemas/types.yaml#/definitions/phandle

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    description:

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      phandle to the memory controller for determining information for the NVDEC

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      firmware secure carveout. This carveout is configured by the bootloader and

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      not accessible to CPU.

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  nvidia,bl-manifest-offset:

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    $ref: /schemas/types.yaml#/definitions/uint32

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    description:

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      Offset to bootloader manifest from beginning of firmware that was configured by

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      the bootloader.

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  nvidia,bl-code-offset:

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    $ref: /schemas/types.yaml#/definitions/uint32

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    description:

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      Offset to bootloader code section from beginning of firmware that was configured by

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      the bootloader.

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  nvidia,bl-data-offset:

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    $ref: /schemas/types.yaml#/definitions/uint32

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    description:

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      Offset to bootloader data section from beginning of firmware that was configured by

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      the bootloader.

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  nvidia,os-manifest-offset:

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    $ref: /schemas/types.yaml#/definitions/uint32

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    description:

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      Offset to operating system manifest from beginning of firmware that was configured by

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      the bootloader.

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  nvidia,os-code-offset:

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    $ref: /schemas/types.yaml#/definitions/uint32

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    description:

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      Offset to operating system code section from beginning of firmware that was configured by

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      the bootloader.

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  nvidia,os-data-offset:

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    $ref: /schemas/types.yaml#/definitions/uint32

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    description:

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      Offset to operating system data section from beginning of firmware that was configured

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      by the bootloader.

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required:

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  - compatible

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  - reg

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  - clocks

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  - clock-names

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  - resets

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  - reset-names

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  - power-domains

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  - nvidia,memory-controller

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  - nvidia,bl-manifest-offset

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  - nvidia,bl-code-offset

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  - nvidia,bl-data-offset

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  - nvidia,os-manifest-offset

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  - nvidia,os-code-offset

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  - nvidia,os-data-offset

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additionalProperties: false

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examples:

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  - |

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    #include <dt-bindings/clock/tegra234-clock.h>

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    #include <dt-bindings/memory/tegra234-mc.h>

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    #include <dt-bindings/power/tegra234-powergate.h>

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    #include <dt-bindings/reset/tegra234-reset.h>

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    nvdec@15480000 {

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            compatible = "nvidia,tegra234-nvdec";

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            reg = <0x15480000 0x00040000>;

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            clocks = <&bpmp TEGRA234_CLK_NVDEC>,

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                     <&bpmp TEGRA234_CLK_FUSE>,

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                     <&bpmp TEGRA234_CLK_TSEC_PKA>;

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            clock-names = "nvdec", "fuse", "tsec_pka";

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            resets = <&bpmp TEGRA234_RESET_NVDEC>;

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            reset-names = "nvdec";

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            power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>;

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            interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDECSRD &emc>,

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                            <&mc TEGRA234_MEMORY_CLIENT_NVDECSWR &emc>;

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            interconnect-names = "dma-mem", "write";

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            iommus = <&smmu_niso1 TEGRA234_SID_NVDEC>;

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            dma-coherent;

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            nvidia,memory-controller = <&mc>;

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            /* Placeholder values, to be replaced with values from overlay */

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            nvidia,bl-manifest-offset = <0>;

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            nvidia,bl-data-offset = <0>;

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            nvidia,bl-code-offset = <0>;

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            nvidia,os-manifest-offset = <0>;

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            nvidia,os-data-offset = <0>;

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            nvidia,os-code-offset = <0>;

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    };

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