Path: blob/master/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml
53932 views
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries2%YAML 1.23---4$id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#67title: I2C for Atmel/Microchip platforms89maintainers:10- Alexandre Belloni <alexandre.belloni@bootlin.com>1112properties:13compatible:14oneOf:15- items:16- enum:17- atmel,at91rm9200-i2c18- atmel,at91sam9261-i2c19- atmel,at91sam9260-i2c20- atmel,at91sam9g20-i2c21- atmel,at91sam9g10-i2c22- atmel,at91sam9x5-i2c23- atmel,sama5d4-i2c24- atmel,sama5d2-i2c25- microchip,sam9x60-i2c26- items:27- enum:28- microchip,lan9691-i2c29- microchip,sama7d65-i2c30- microchip,sama7g5-i2c31- microchip,sam9x7-i2c32- const: microchip,sam9x60-i2c3334reg:35maxItems: 13637interrupts:38maxItems: 13940clocks:41maxItems: 14243clock-frequency:44default: 1000004546dmas:47items:48- description: TX DMA Channel Specifier49- description: RX DMA Channel Specifier5051dma-names:52items:53- const: tx54- const: rx5556atmel,fifo-size:57$ref: /schemas/types.yaml#/definitions/uint3258description: |59Maximum number of data the RX and TX FIFOs can store for60FIFO capable I2C controllers.6162scl-gpios: true6364sda-gpios: true6566required:67- compatible68- reg69- interrupts70- clocks7172allOf:73- $ref: /schemas/i2c/i2c-controller.yaml#74- if:75properties:76compatible:77contains:78enum:79- atmel,sama5d4-i2c80- atmel,sama5d2-i2c81- microchip,sam9x60-i2c82- microchip,sama7d65-i2c83- microchip,sama7g5-i2c84then:85properties:86i2c-sda-hold-time-ns:87description:88TWD hold time89maxItems: 19091unevaluatedProperties: false9293examples:94- |95#include <dt-bindings/interrupt-controller/irq.h>96#include <dt-bindings/dma/at91.h>97#include <dt-bindings/gpio/gpio.h>9899i2c0: i2c@fff84000 {100compatible = "atmel,at91sam9g20-i2c";101reg = <0xfff84000 0x100>;102interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;103#address-cells = <1>;104#size-cells = <0>;105clocks = <&twi0_clk>;106clock-frequency = <400000>;107108eeprom@50 {109compatible = "atmel,24c512";110reg = <0x50>;111pagesize = <128>;112};113};114115i2c1: i2c@f8034600 {116compatible = "atmel,sama5d2-i2c";117reg = <0xf8034600 0x100>;118interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;119dmas = <&dma0120(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))121AT91_XDMAC_DT_PERID(11)>,122<&dma0123(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))124AT91_XDMAC_DT_PERID(12)>;125dma-names = "tx", "rx";126#address-cells = <1>;127#size-cells = <0>;128clocks = <&flx0>;129atmel,fifo-size = <16>;130i2c-sda-hold-time-ns = <336>;131pinctrl-names = "default", "gpio";132pinctrl-0 = <&pinctrl_i2c0>;133pinctrl-1 = <&pinctrl_i2c0_gpio>;134sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;135scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;136137eeprom@54 {138compatible = "atmel,24c02";139reg = <0x54>;140pagesize = <16>;141};142};143144145