Path: blob/master/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.yaml
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause1%YAML 1.22---3$id: http://devicetree.org/schemas/i2c/brcm,iproc-i2c.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Broadcom iProc I2C controller78maintainers:9- Rafał Miłecki <rafal@milecki.pl>1011properties:12compatible:13enum:14- brcm,iproc-i2c15- brcm,iproc-nic-i2c1617reg:18maxItems: 11920clock-frequency:21enum: [ 100000, 400000 ]2223interrupts:24description: |25Should contain the I2C interrupt. For certain revisions of the I2C26controller, I2C interrupt is unwired to the interrupt controller. In such27case, this property should be left unspecified, and driver will fall back28to polling mode29maxItems: 13031brcm,ape-hsls-addr-mask:32$ref: /schemas/types.yaml#/definitions/uint3233description: Host view of address mask into the 'APE' co-processor3435allOf:36- $ref: /schemas/i2c/i2c-controller.yaml#37- if:38properties:39compatible:40contains:41const: brcm,iproc-nic-i2c42then:43required:44- brcm,ape-hsls-addr-mask4546unevaluatedProperties: false4748required:49- reg50- clock-frequency51- '#address-cells'52- '#size-cells'5354examples:55- |56#include <dt-bindings/interrupt-controller/arm-gic.h>5758i2c@18008000 {59compatible = "brcm,iproc-i2c";60reg = <0x18008000 0x100>;61#address-cells = <1>;62#size-cells = <0>;63interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;64clock-frequency = <100000>;6566wm8750@1a {67compatible = "wlf,wm8750";68reg = <0x1a>;69};70};717273