Path: blob/master/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Samsung's High Speed I2C controller78maintainers:9- Krzysztof Kozlowski <krzk@kernel.org>1011description: |12The Samsung's High Speed I2C controller is used to interface with I2C devices13at various speeds ranging from 100kHz to 3.4MHz.1415In case the HSI2C controller is encapsulated within USI block (it's the case16e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to17define USI node in device tree file, choosing "i2c" configuration. Please see18Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.1920properties:21compatible:22oneOf:23- enum:24- samsung,exynos5250-hsi2c # Exynos5250 and Exynos542025- samsung,exynos5260-hsi2c # Exynos526026- samsung,exynos7-hsi2c # Exynos727- samsung,exynos8895-hsi2c28- samsung,exynosautov9-hsi2c29- items:30- enum:31- samsung,exynos5433-hsi2c32- samsung,exynos7870-hsi2c33- tesla,fsd-hsi2c34- const: samsung,exynos7-hsi2c35- items:36- enum:37- google,gs101-hsi2c38- samsung,exynos2200-hsi2c39- samsung,exynos850-hsi2c40- const: samsung,exynosautov9-hsi2c41- const: samsung,exynos5-hsi2c # Exynos5250 and Exynos542042deprecated: true4344reg:45maxItems: 14647interrupts:48maxItems: 14950clock-frequency:51default: 10000052description:53Desired operating frequency in Hz of the bus.5455If not specified, the bus operates in fast-speed mode at 100kHz.5657If specified, the bus operates in high-speed mode only if the58clock-frequency is >= 1MHz.5960clocks:61minItems: 162items:63- description: I2C operating clock64- description: Bus clock (APB)6566clock-names:67minItems: 168items:69- const: hsi2c70- const: hsi2c_pclk7172required:73- compatible74- reg75- interrupts76- clocks7778allOf:79- $ref: /schemas/i2c/i2c-controller.yaml#80- if:81properties:82compatible:83contains:84enum:85- samsung,exynosautov9-hsi2c8687then:88properties:89clocks:90minItems: 29192clock-names:93minItems: 29495required:96- clock-names9798else:99properties:100clocks:101maxItems: 1102103unevaluatedProperties: false104105examples:106- |107#include <dt-bindings/clock/exynos5420.h>108#include <dt-bindings/interrupt-controller/arm-gic.h>109#include <dt-bindings/interrupt-controller/irq.h>110111hsi2c_8: i2c@12e00000 {112compatible = "samsung,exynos5250-hsi2c";113reg = <0x12e00000 0x1000>;114interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;115#address-cells = <1>;116#size-cells = <0>;117clock-frequency = <100000>;118clocks = <&clock CLK_USI4>;119clock-names = "hsi2c";120121pmic@66 {122/* compatible = "samsung,s2mps11-pmic"; */123reg = <0x66>;124};125};126127- |128#include <dt-bindings/clock/exynos850.h>129#include <dt-bindings/interrupt-controller/arm-gic.h>130131hsi2c_2: i2c@138c0000 {132compatible = "samsung,exynosautov9-hsi2c";133reg = <0x138c0000 0xc0>;134interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;135#address-cells = <1>;136#size-cells = <0>;137clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,138<&cmu_peri CLK_GOUT_HSI2C2_PCLK>;139clock-names = "hsi2c", "hsi2c_pclk";140141pmic@66 {142/* compatible = "samsung,s2mps11-pmic"; */143reg = <0x66>;144};145};146147148