Path: blob/master/Documentation/devicetree/bindings/i2c/i2c-mux.yaml
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# SPDX-License-Identifier: GPL-2.01%YAML 1.22---3$id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Common i2c bus multiplexer/switch properties.78maintainers:9- Peter Rosin <peda@axentia.se>1011description: |+12An i2c bus multiplexer/switch will have several child busses that are numbered13uniquely in a device dependent manner. The nodes for an i2c bus14multiplexer/switch will have one child node for each child bus.1516For i2c multiplexers/switches that have child nodes that are a mixture of both17i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for18populating the i2c child busses. If an 'i2c-mux' subnode is present, only19subnodes of this will be considered as i2c child busses.2021properties:22$nodename:23pattern: '^(i2c-?)?mux'2425'#address-cells':26const: 12728'#size-cells':29const: 03031patternProperties:32'^i2c@[0-9a-f]+$':33$ref: /schemas/i2c/i2c-controller.yaml34unevaluatedProperties: false3536properties:37reg:38description: The mux selector sub-bus number for the child I2C bus.39maxItems: 14041additionalProperties: true4243examples:44- |45/*46* An NXP pca9548 8 channel I2C multiplexer at address 0x7047* with two NXP pca8574 GPIO expanders attached, one each to48* ports 3 and 4.49*/50i2c {51#address-cells = <1>;52#size-cells = <0>;5354i2c-mux@70 {55compatible = "nxp,pca9548";56reg = <0x70>;57#address-cells = <1>;58#size-cells = <0>;5960i2c@3 {61#address-cells = <1>;62#size-cells = <0>;63reg = <3>;6465gpio@20 {66compatible = "nxp,pca9555";67gpio-controller;68#gpio-cells = <2>;69reg = <0x20>;70};71};72i2c@4 {73#address-cells = <1>;74#size-cells = <0>;75reg = <4>;7677gpio@20 {78compatible = "nxp,pca9555";79gpio-controller;80#gpio-cells = <2>;81reg = <0x20>;82};83};84};85};86...878889