Path: blob/master/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
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# SPDX-License-Identifier: GPL-2.01%YAML 1.22---3$id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Rockchip RK3xxx I2C controller78description:9This driver interfaces with the native I2C controller present in Rockchip10RK3xxx SoCs.1112allOf:13- $ref: /schemas/i2c/i2c-controller.yaml#1415maintainers:16- Heiko Stuebner <heiko@sntech.de>1718# Everything else is described in the common file19properties:20compatible:21oneOf:22- const: rockchip,rv1108-i2c23- const: rockchip,rk3066-i2c24- const: rockchip,rk3188-i2c25- const: rockchip,rk3228-i2c26- const: rockchip,rk3288-i2c27- const: rockchip,rk3399-i2c28- items:29- enum:30- rockchip,rk3036-i2c31- rockchip,rk3128-i2c32- rockchip,rk3368-i2c33- const: rockchip,rk3288-i2c34- items:35- enum:36- rockchip,px30-i2c37- rockchip,rk3308-i2c38- rockchip,rk3328-i2c39- rockchip,rk3506-i2c40- rockchip,rk3528-i2c41- rockchip,rk3562-i2c42- rockchip,rk3568-i2c43- rockchip,rk3576-i2c44- rockchip,rk3588-i2c45- rockchip,rv1126-i2c46- const: rockchip,rk3399-i2c4748reg:49maxItems: 15051interrupts:52maxItems: 15354clocks:55minItems: 156items:57- description:58For older hardware (rk3066, rk3188, rk3228, rk3288)59there is one clock that is used both to derive the functional clock60for the device and as the bus clock.61For newer hardware (rk3399) this clock is used to derive62the functional clock63- description:64For newer hardware (rk3399) this is the bus clock6566clock-names:67minItems: 168items:69- const: i2c70- const: pclk7172rockchip,grf:73$ref: /schemas/types.yaml#/definitions/phandle74description:75Required on RK3066, RK3188 the phandle of the syscon node for76the general register file (GRF)77On those SoCs an alias with the correct I2C bus ID78(bit offset in the GRF) is also required.7980clock-frequency:81default: 10000082description:83SCL frequency to use (in Hz). If omitted, 100kHz is used.8485i2c-scl-rising-time-ns:86default: 100087description:88Number of nanoseconds the SCL signal takes to rise89(t(r) in I2C specification). If not specified this is assumed to be90the maximum the specification allows(1000 ns for Standard-mode,91300 ns for Fast-mode) which might cause slightly slower communication.9293i2c-scl-falling-time-ns:94default: 30095description:96Number of nanoseconds the SCL signal takes to fall97(t(f) in the I2C specification). If not specified this is assumed to98be the maximum the specification allows (300 ns) which might cause99slightly slower communication.100101i2c-sda-falling-time-ns:102default: 300103description:104Number of nanoseconds the SDA signal takes to fall105(t(f) in the I2C specification). If not specified we will use the SCL106value since they are the same in nearly all cases.107108power-domains:109maxItems: 1110111required:112- compatible113- reg114- interrupts115- clocks116- clock-names117118if:119properties:120compatible:121contains:122enum:123- rockchip,rk3066-i2c124- rockchip,rk3188-i2c125126then:127required:128- rockchip,grf129130unevaluatedProperties: false131132examples:133- |134#include <dt-bindings/clock/rk3188-cru-common.h>135#include <dt-bindings/interrupt-controller/arm-gic.h>136#include <dt-bindings/interrupt-controller/irq.h>137i2c0: i2c@2002d000 {138compatible = "rockchip,rk3188-i2c";139reg = <0x2002d000 0x1000>;140interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;141clocks = <&cru PCLK_I2C0>;142clock-names = "i2c";143rockchip,grf = <&grf>;144i2c-scl-falling-time-ns = <100>;145i2c-scl-rising-time-ns = <800>;146#address-cells = <1>;147#size-cells = <0>;148};149150151