Path: blob/master/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: ADC that forms part of an ASPEED server management processor.78maintainers:9- Billy Tsai <billy_tsai@aspeedtech.com>1011description: |12• 10-bits resolution for 16 voltage channels.13• The device split into two individual engine and each contains 8 voltage14channels.15• Channel scanning can be non-continuous.16• Programmable ADC clock frequency.17• Programmable upper and lower threshold for each channels.18• Interrupt when larger or less than threshold for each channels.19• Support hysteresis for each channels.20• Built-in a compensating method.21• Built-in a register to trim internal reference voltage.22• Internal or External reference voltage.23• Support 2 Internal reference voltage 1.2v or 2.5v.24• Integrate dividing circuit for battery sensing.2526properties:27compatible:28enum:29- aspeed,ast2600-adc030- aspeed,ast2600-adc131description:32Their trimming data, which is used to calibrate internal reference volage,33locates in different address of OTP.3435reg:36maxItems: 13738clocks:39maxItems: 140description:41Input clock used to derive the sample clock. Expected to be the42SoC's APB clock.4344resets:45maxItems: 14647"#io-channel-cells":48const: 14950vref-supply:51description:52The external regulator supply ADC reference voltage.5354aspeed,int-vref-microvolt:55enum: [1200000, 2500000]56description:57ADC internal reference voltage in microvolts.5859aspeed,battery-sensing:60type: boolean61description:62Inform the driver that last channel will be used to sensor battery.6364required:65- compatible66- reg67- clocks68- resets69- "#io-channel-cells"7071additionalProperties: false7273examples:74- |75#include <dt-bindings/clock/ast2600-clock.h>76adc0: adc@1e6e9000 {77compatible = "aspeed,ast2600-adc0";78reg = <0x1e6e9000 0x100>;79clocks = <&syscon ASPEED_CLK_APB2>;80resets = <&syscon ASPEED_RESET_ADC>;81#io-channel-cells = <1>;82aspeed,int-vref-microvolt = <2500000>;83};84adc1: adc@1e6e9100 {85compatible = "aspeed,ast2600-adc1";86reg = <0x1e6e9100 0x100>;87clocks = <&syscon ASPEED_CLK_APB2>;88resets = <&syscon ASPEED_RESET_ADC>;89#io-channel-cells = <1>;90aspeed,int-vref-microvolt = <2500000>;91};92...939495