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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

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%YAML 1.2

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---

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$id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml#

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$schema: http://devicetree.org/meta-schemas/core.yaml#

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title: AT91 SAMA5D2 Analog to Digital Converter (ADC)

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maintainers:

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  - Eugen Hristev <eugen.hristev@microchip.com>

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properties:

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  compatible:

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    enum:

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      - atmel,sama5d2-adc

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      - microchip,sam9x60-adc

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      - microchip,sama7g5-adc

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  reg:

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    maxItems: 1

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  interrupts:

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    maxItems: 1

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  clocks:

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    maxItems: 1

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  clock-names:

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    const: adc_clk

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  vref-supply: true

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  vddana-supply: true

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  atmel,min-sample-rate-hz:

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    description: Minimum sampling rate, it depends on SoC.

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  atmel,max-sample-rate-hz:

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    description: Maximum sampling rate, it depends on SoC.

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  atmel,startup-time-ms:

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    description: Startup time expressed in ms, it depends on SoC.

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  atmel,trigger-edge-type:

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    $ref: /schemas/types.yaml#/definitions/uint32

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    description:

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      One of possible edge types for the ADTRG hardware trigger pin.

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      When the specific edge type is detected, the conversion will

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      start. Should be one of IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING

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      or IRQ_TYPE_EDGE_BOTH.

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    enum: [1, 2, 3]

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  dmas:

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    maxItems: 1

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  dma-names:

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    const: rx

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  "#io-channel-cells":

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    const: 1

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additionalProperties: false

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required:

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  - compatible

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  - reg

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  - interrupts

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  - clocks

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  - clock-names

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  - vref-supply

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  - vddana-supply

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  - atmel,min-sample-rate-hz

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  - atmel,max-sample-rate-hz

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  - atmel,startup-time-ms

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examples:

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  - |

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    #include <dt-bindings/dma/at91.h>

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    #include <dt-bindings/interrupt-controller/irq.h>

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    soc {

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        #address-cells = <1>;

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        #size-cells = <1>;

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        adc@fc030000 {

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            compatible = "atmel,sama5d2-adc";

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            reg = <0xfc030000 0x100>;

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            interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;

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            clocks = <&adc_clk>;

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            clock-names = "adc_clk";

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            atmel,min-sample-rate-hz = <200000>;

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            atmel,max-sample-rate-hz = <20000000>;

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            atmel,startup-time-ms = <4>;

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            vddana-supply = <&vdd_3v3_lp_reg>;

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            vref-supply = <&vdd_3v3_lp_reg>;

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            atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>;

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            dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;

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            dma-names = "rx";

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            #io-channel-cells = <1>;

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        };

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    };

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...

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