Path: blob/master/Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/iio/dac/adi,ltc2672.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Analog Devices LTC2672 DAC78maintainers:9- Michael Hennerich <michael.hennerich@analog.com>10- Kim Seer Paller <kimseer.paller@analog.com>1112description: |13Analog Devices LTC2672 5 channel, 12-/16-Bit, 300mA DAC14https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2672.pdf1516properties:17compatible:18enum:19- adi,ltc26722021reg:22maxItems: 12324spi-max-frequency:25maximum: 500000002627vcc-supply:28description: Analog Supply Voltage Input.2930v-neg-supply:31description: Negative Supply Voltage Input.3233vdd0-supply:34description: Positive Supply Voltage Input for DAC OUT0.3536vdd1-supply:37description: Positive Supply Voltage Input for DAC OUT1.3839vdd2-supply:40description: Positive Supply Voltage Input for DAC OUT2.4142vdd3-supply:43description: Positive Supply Voltage Input for DAC OUT3.4445vdd4-supply:46description: Positive Supply Voltage Input for DAC OUT4.4748iovcc-supply:49description: Digital Input/Output Supply Voltage.5051ref-supply:52description:53Reference Input/Output. The voltage at the REF pin sets the full-scale54range of all channels. If not provided the internal reference is used and55also provided on the VREF pin.5657reset-gpios:58description:59Active Low Asynchronous Clear Input. A logic low at this level triggered60input clears the device to the default reset code and output range, which61is zero-scale with the outputs off. The control registers are cleared to62zero.63maxItems: 16465adi,rfsadj-ohms:66description:67If FSADJ is tied to VCC, an internal RFSADJ (20 kΩ) is selected, which68results in nominal output ranges. When an external resistor of 19 kΩ to6941 kΩ can be used instead by connecting the resistor between FSADJ and GND70it controls the scaling of the ranges, and the internal resistor is71automatically disconnected.72minimum: 1900073maximum: 4100074default: 200007576io-channels:77description:78ADC channel to monitor voltages and currents at the MUX pin.79maxItems: 18081'#address-cells':82const: 18384'#size-cells':85const: 08687patternProperties:88"^channel@[0-4]$":89$ref: dac.yaml90type: object91additionalProperties: false9293properties:94reg:95description: The channel number representing the DAC output channel.96maximum: 49798adi,toggle-mode:99description:100Set the channel as a toggle enabled channel. Toggle operation enables101fast switching of a DAC output between two different DAC codes without102any SPI transaction.103type: boolean104105output-range-microamp:106items:107- const: 0108- enum: [3125000, 6250000, 12500000, 25000000, 50000000, 100000000,109200000000, 300000000]110111required:112- reg113- output-range-microamp114115required:116- compatible117- reg118- spi-max-frequency119- vcc-supply120- iovcc-supply121- v-neg-supply122123allOf:124- $ref: /schemas/spi/spi-peripheral-props.yaml#125126unevaluatedProperties: false127128examples:129- |130spi {131#address-cells = <1>;132#size-cells = <0>;133dac@0 {134compatible = "adi,ltc2672";135reg = <0>;136spi-max-frequency = <10000000>;137138vcc-supply = <&vcc>;139iovcc-supply = <&vcc>;140ref-supply = <&vref>;141v-neg-supply = <&vneg>;142143io-channels = <&adc 0>;144145#address-cells = <1>;146#size-cells = <0>;147channel@0 {148reg = <0>;149adi,toggle-mode;150output-range-microamp = <0 3125000>;151};152153channel@1 {154reg = <1>;155output-range-microamp = <0 6250000>;156};157};158};159...160161162