Path: blob/master/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml
54608 views
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/iio/frequency/adi,adf4377.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: ADF4377 Microwave Wideband Synthesizer with Integrated VCO78maintainers:9- Antoniu Miclaus <antoniu.miclaus@analog.com>10- Dragos Bogdan <dragos.bogdan@analog.com>1112description: |13The ADF4377 is a high performance, ultralow jitter, dual output integer-N14phased locked loop (PLL) with integrated voltage controlled oscillator (VCO)15ideally suited for data converter and mixed signal front end (MxFE) clock16applications.1718https://www.analog.com/en/products/adf4377.html19https://www.analog.com/en/products/adf4378.html2021properties:22compatible:23enum:24- adi,adf437725- adi,adf43782627reg:28maxItems: 12930spi-max-frequency:31maximum: 100000003233clocks:34maxItems: 13536clock-names:37description:38External clock that provides reference input frequency.39items:40- const: ref_in4142'#clock-cells':43const: 04445clock-output-names:46maxItems: 14748chip-enable-gpios:49description:50GPIO that controls the Chip Enable Pin.51maxItems: 15253clk1-enable-gpios:54description:55GPIO that controls the Enable Clock 1 Output Buffer Pin.56maxItems: 15758clk2-enable-gpios:59description:60GPIO that controls the Enable Clock 2 Output Buffer Pin.61maxItems: 16263adi,muxout-select:64description:65On chip multiplexer output selection.66high_z - MUXOUT Pin set to high-Z.67lock_detect - MUXOUT Pin set to lock detector output.68muxout_low - MUXOUT Pin set to low.69f_div_rclk_2 - MUXOUT Pin set to fDIV_RCLK/2.70f_div_nclk_2 - MUXOUT Pin set to fDIV_NCLK/2.71muxout_high - MUXOUT Pin set to high.72enum: [high_z, lock_detect, muxout_low, f_div_rclk_2, f_div_nclk_2, muxout_high]7374required:75- compatible76- reg77- clocks78- clock-names7980allOf:81- $ref: /schemas/spi/spi-peripheral-props.yaml#82- if:83properties:84compatible:85contains:86enum:87- adi,adf437888then:89properties:90clk2-enable-gpios: false9192unevaluatedProperties: false9394examples:95- |96spi {97#address-cells = <1>;98#size-cells = <0>;99frequency@0 {100compatible = "adi,adf4377";101reg = <0>;102spi-max-frequency = <10000000>;103clocks = <&adf4377_ref_in>;104clock-names = "ref_in";105#clock-cells = <0>;106clock-output-names = "adf4377";107};108};109...110111112