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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/arc/include/asm/futex.h
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/* SPDX-License-Identifier: GPL-2.0-only */

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/*

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 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)

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 *

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 * Vineetg: August 2010: From Android kernel work

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 */

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#ifndef _ASM_FUTEX_H

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#define _ASM_FUTEX_H

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#include <linux/futex.h>

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#include <linux/preempt.h>

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#include <linux/uaccess.h>

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#include <asm/errno.h>

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#ifdef CONFIG_ARC_HAS_LLSC

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#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\

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							\

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	smp_mb();					\

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	__asm__ __volatile__(				\

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	"1:	llock	%1, [%2]		\n"	\

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		insn				"\n"	\

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	"2:	scond	%0, [%2]		\n"	\

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	"	bnz	1b			\n"	\

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	"	mov %0, 0			\n"	\

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	"3:					\n"	\

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	"	.section .fixup,\"ax\"		\n"	\

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	"	.align  4			\n"	\

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	"4:	mov %0, %4			\n"	\

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	"	j   3b				\n"	\

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	"	.previous			\n"	\

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	"	.section __ex_table,\"a\"	\n"	\

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	"	.align  4			\n"	\

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	"	.word   1b, 4b			\n"	\

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	"	.word   2b, 4b			\n"	\

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	"	.previous			\n"	\

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							\

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	: "=&r" (ret), "=&r" (oldval)			\

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	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT)	\

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	: "cc", "memory");				\

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	smp_mb()					\

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#else	/* !CONFIG_ARC_HAS_LLSC */

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#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\

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							\

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	smp_mb();					\

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	__asm__ __volatile__(				\

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	"1:	ld	%1, [%2]		\n"	\

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		insn				"\n"	\

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	"2:	st	%0, [%2]		\n"	\

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	"	mov %0, 0			\n"	\

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	"3:					\n"	\

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	"	.section .fixup,\"ax\"		\n"	\

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	"	.align  4			\n"	\

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	"4:	mov %0, %4			\n"	\

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	"	j   3b				\n"	\

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	"	.previous			\n"	\

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	"	.section __ex_table,\"a\"	\n"	\

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	"	.align  4			\n"	\

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	"	.word   1b, 4b			\n"	\

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	"	.word   2b, 4b			\n"	\

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	"	.previous			\n"	\

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							\

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	: "=&r" (ret), "=&r" (oldval)			\

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	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT)	\

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	: "cc", "memory");				\

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	smp_mb()					\

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#endif

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static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,

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		u32 __user *uaddr)

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{

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	int oldval = 0, ret;

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	if (!access_ok(uaddr, sizeof(u32)))

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		return -EFAULT;

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#ifndef CONFIG_ARC_HAS_LLSC

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	preempt_disable();	/* to guarantee atomic r-m-w of futex op */

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#endif

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	switch (op) {

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	case FUTEX_OP_SET:

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		__futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg);

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		break;

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	case FUTEX_OP_ADD:

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		/* oldval = *uaddr; *uaddr += oparg ; ret = *uaddr */

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		__futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg);

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		break;

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	case FUTEX_OP_OR:

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		__futex_atomic_op("or  %0, %1, %3", ret, oldval, uaddr, oparg);

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		break;

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	case FUTEX_OP_ANDN:

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		__futex_atomic_op("bic %0, %1, %3", ret, oldval, uaddr, oparg);

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		break;

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	case FUTEX_OP_XOR:

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		__futex_atomic_op("xor %0, %1, %3", ret, oldval, uaddr, oparg);

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		break;

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	default:

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		ret = -ENOSYS;

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	}

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#ifndef CONFIG_ARC_HAS_LLSC

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	preempt_enable();

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#endif

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	if (!ret)

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		*oval = oldval;

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	return ret;

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}

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/*

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 * cmpxchg of futex (pagefaults disabled by caller)

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 * Return 0 for success, -EFAULT otherwise

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 */

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static inline int

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futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 expval,

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			      u32 newval)

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{

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	int ret = 0;

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	u32 existval;

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	if (!access_ok(uaddr, sizeof(u32)))

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		return -EFAULT;

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#ifndef CONFIG_ARC_HAS_LLSC

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	preempt_disable();	/* to guarantee atomic r-m-w of futex op */

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#endif

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	smp_mb();

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	__asm__ __volatile__(

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#ifdef CONFIG_ARC_HAS_LLSC

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	"1:	llock	%1, [%4]		\n"

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	"	brne	%1, %2, 3f		\n"

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	"2:	scond	%3, [%4]		\n"

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	"	bnz	1b			\n"

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#else

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	"1:	ld	%1, [%4]		\n"

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	"	brne	%1, %2, 3f		\n"

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	"2:	st	%3, [%4]		\n"

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#endif

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	"3:	\n"

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	"	.section .fixup,\"ax\"	\n"

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	"4:	mov %0, %5	\n"

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	"	j   3b	\n"

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	"	.previous	\n"

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	"	.section __ex_table,\"a\"	\n"

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	"	.align  4	\n"

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	"	.word   1b, 4b	\n"

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	"	.word   2b, 4b	\n"

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	"	.previous\n"

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	: "+&r"(ret), "=&r"(existval)

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	: "r"(expval), "r"(newval), "r"(uaddr), "ir"(-EFAULT)

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	: "cc", "memory");

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	smp_mb();

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#ifndef CONFIG_ARC_HAS_LLSC

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	preempt_enable();

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#endif

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	*uval = existval;

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	return ret;

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}

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#endif

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