/* SPDX-License-Identifier: GPL-2.0 */1/*2* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.3* http://www.samsung.com4*/56/* pull in the relevant register and map files. */78#define S3C_ADDR_BASE 0xF60000009#define S3C_VA_UART S3C_ADDR_BASE + 0x0100000010#define EXYNOS4_PA_UART 0x1380000011#define EXYNOS5_PA_UART 0x12C000001213/* note, for the boot process to work we have to keep the UART14* virtual address aligned to an 1MiB boundary for the L115* mapping the head code makes. We keep the UART virtual address16* aligned and add in the offset when we load the value here.17*/1819.macro addruart, rp, rv, tmp20mrc p15, 0, \tmp, c0, c0, 021and \tmp, \tmp, #0xf022teq \tmp, #0xf0 @@ A1523beq 100f24mrc p15, 0, \tmp, c0, c0, 525and \tmp, \tmp, #0xf0026teq \tmp, #0x100 @@ A15 + A7 but boot to A727100: ldreq \rp, =EXYNOS5_PA_UART28movne \rp, #EXYNOS4_PA_UART @@ EXYNOS429ldr \rv, =S3C_VA_UART30#if CONFIG_DEBUG_S3C_UART != 031add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)32add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)33#endif34.endm3536#define fifo_full fifo_full_s5pv21037#define fifo_level fifo_level_s5pv2103839#include <debug/samsung.S>404142