CoCalc -- cm-regbits-54xx.h

GitHub Repository: torvalds/linux
Path: blob/master/arch/arm/mach-omap2/cm-regbits-54xx.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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 * OMAP54xx Clock Management register bits
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 *
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 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
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 *
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 * Paul Walmsley ([email protected])
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 * Rajendra Nayak ([email protected])
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 * Benoit Cousson ([email protected])
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 *
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 * This file is automatically generated from the OMAP hardware databases.
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 * We respectfully ask that any modifications to this file be coordinated
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 * with the public [email protected] mailing list and the
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 * authors above to ensure that the autogeneration scripts are kept
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 * up-to-date with the file contents.
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 */
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#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_54XX_H
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#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_54XX_H
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#define OMAP54XX_ABE_STATDEP_SHIFT					3
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#define OMAP54XX_AUTO_DPLL_MODE_MASK					(0x7 << 0)
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#define OMAP54XX_CLKSEL_SHIFT						24
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#define OMAP54XX_CLKSEL_WIDTH						0x1
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#define OMAP54XX_CLKSEL_0_0_SHIFT					0
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#define OMAP54XX_CLKSEL_0_0_WIDTH					0x1
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#define OMAP54XX_CLKSEL_AESS_FCLK_SHIFT					24
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#define OMAP54XX_CLKSEL_AESS_FCLK_WIDTH					0x1
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#define OMAP54XX_CLKSEL_DIV_SHIFT					25
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#define OMAP54XX_CLKSEL_DIV_WIDTH					0x1
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#define OMAP54XX_CLKSEL_FCLK_SHIFT					24
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#define OMAP54XX_CLKSEL_FCLK_WIDTH					0x1
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#define OMAP54XX_CLKSEL_GPU_CORE_GCLK_SHIFT				24
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#define OMAP54XX_CLKSEL_GPU_CORE_GCLK_WIDTH				0x1
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#define OMAP54XX_CLKSEL_GPU_HYD_GCLK_SHIFT				25
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#define OMAP54XX_CLKSEL_GPU_HYD_GCLK_WIDTH				0x1
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#define OMAP54XX_CLKSEL_INTERNAL_SOURCE_SHIFT				26
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#define OMAP54XX_CLKSEL_INTERNAL_SOURCE_WIDTH				0x2
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#define OMAP54XX_CLKSEL_OPP_SHIFT					0
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#define OMAP54XX_CLKSEL_OPP_WIDTH					0x2
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#define OMAP54XX_CLKSEL_SOURCE_SHIFT					24
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#define OMAP54XX_CLKSEL_SOURCE_WIDTH					0x2
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#define OMAP54XX_CLKSEL_SOURCE_L3INIT_MMC1_SHIFT			24
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#define OMAP54XX_CLKSEL_SOURCE_L3INIT_MMC1_WIDTH			0x1
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#define OMAP54XX_CLKSEL_UTMI_P1_SHIFT					24
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#define OMAP54XX_CLKSEL_UTMI_P1_WIDTH					0x1
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#define OMAP54XX_CLKSEL_UTMI_P2_SHIFT					25
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#define OMAP54XX_CLKSEL_UTMI_P2_WIDTH					0x1
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#define OMAP54XX_DIVHS_MASK						(0x3f << 0)
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#define OMAP54XX_DIVHS_0_4_MASK						(0x1f << 0)
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#define OMAP54XX_DIVHS_0_6_MASK						(0x7f << 0)
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#define OMAP54XX_DPLL_DIV_MASK						(0x7f << 0)
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#define OMAP54XX_DPLL_EN_MASK						(0x7 << 0)
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#define OMAP54XX_DPLL_LPMODE_EN_MASK					(1 << 10)
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#define OMAP54XX_DPLL_MULT_MASK						(0x7ff << 8)
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#define OMAP54XX_DPLL_REGM4XEN_MASK					(1 << 11)
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#define OMAP54XX_DPLL_SD_DIV_MASK					(0xff << 24)
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#define OMAP54XX_DSP_STATDEP_SHIFT					1
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#define OMAP54XX_DSS_STATDEP_SHIFT					8
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#define OMAP54XX_EMIF_STATDEP_SHIFT					4
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#define OMAP54XX_GPU_STATDEP_SHIFT					10
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#define OMAP54XX_IPU_STATDEP_SHIFT					0
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#define OMAP54XX_IVA_STATDEP_SHIFT					2
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#define OMAP54XX_L3INIT_STATDEP_SHIFT					7
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#define OMAP54XX_L3MAIN1_STATDEP_SHIFT					5
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#define OMAP54XX_L3MAIN2_STATDEP_SHIFT					6
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#define OMAP54XX_L4CFG_STATDEP_SHIFT					12
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#define OMAP54XX_L4PER_STATDEP_SHIFT					13
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#define OMAP54XX_L4SEC_STATDEP_SHIFT					14
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#define OMAP54XX_OPTFCLKEN_32KHZ_CLK_SHIFT				11
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#define OMAP54XX_OPTFCLKEN_32KHZ_CLK_8_8_SHIFT				8
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#define OMAP54XX_OPTFCLKEN_48MHZ_CLK_SHIFT				9
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#define OMAP54XX_OPTFCLKEN_CLK32K_SHIFT					8
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#define OMAP54XX_OPTFCLKEN_CTRLCLK_SHIFT				8
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#define OMAP54XX_OPTFCLKEN_DBCLK_SHIFT					8
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#define OMAP54XX_OPTFCLKEN_DSSCLK_SHIFT					8
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#define OMAP54XX_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT			13
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#define OMAP54XX_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT			14
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#define OMAP54XX_OPTFCLKEN_HSIC480M_P3_CLK_SHIFT			7
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#define OMAP54XX_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT				11
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#define OMAP54XX_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT				12
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#define OMAP54XX_OPTFCLKEN_HSIC60M_P3_CLK_SHIFT				6
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#define OMAP54XX_OPTFCLKEN_REFCLK960M_SHIFT				8
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#define OMAP54XX_OPTFCLKEN_REF_CLK_SHIFT				8
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#define OMAP54XX_OPTFCLKEN_SLIMBUS_CLK_SHIFT				11
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#define OMAP54XX_OPTFCLKEN_SYS_CLK_SHIFT				10
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#define OMAP54XX_OPTFCLKEN_TXPHY_CLK_SHIFT				8
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#define OMAP54XX_OPTFCLKEN_TXPHY_LS_CLK_SHIFT				9
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#define OMAP54XX_OPTFCLKEN_USB_CH0_CLK_SHIFT				8
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#define OMAP54XX_OPTFCLKEN_USB_CH1_CLK_SHIFT				9
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#define OMAP54XX_OPTFCLKEN_USB_CH2_CLK_SHIFT				10
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#define OMAP54XX_OPTFCLKEN_UTMI_P1_CLK_SHIFT				8
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#define OMAP54XX_OPTFCLKEN_UTMI_P2_CLK_SHIFT				9
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#define OMAP54XX_OPTFCLKEN_UTMI_P3_CLK_SHIFT				10
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#define OMAP54XX_PAD_CLKS_GATE_SHIFT					8
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#define OMAP54XX_SLIMBUS1_CLK_GATE_SHIFT				10
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#define OMAP54XX_ST_DPLL_CLK_MASK					(1 << 0)
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#define OMAP54XX_SYS_CLKSEL_SHIFT					0
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#define OMAP54XX_SYS_CLKSEL_WIDTH					0x3
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#define OMAP54XX_WKUPAON_STATDEP_SHIFT					15
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#endif
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