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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts
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// SPDX-License-Identifier: GPL-2.0-only OR MIT

/dts-v1/;

#include "mt7981b.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "dt-bindings/pinctrl/mt65xx.h"

/ {
	compatible = "openwrt,one", "mediatek,mt7981b";
	model = "OpenWrt One";

	aliases {
		ethernet0 = &gmac1;
		ethernet1 = &gmac0;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@40000000 {
		reg = <0 0x40000000 0 0x40000000>;
		device_type = "memory";
	};

	pwm-leds {
		compatible = "pwm-leds";

		led-0 {
			color = <LED_COLOR_ID_WHITE>;
			default-brightness = <0>;
			function = LED_FUNCTION_STATUS;
			max-brightness = <255>;
			pwms = <&pwm 0 10000>;
		};

		led-1 {
			color = <LED_COLOR_ID_GREEN>;
			default-brightness = <0>;
			function = LED_FUNCTION_STATUS;
			max-brightness = <255>;
			pwms = <&pwm 1 10000>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		led-0 {
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_STATUS;
			gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
		};

		led-1 {
			color = <LED_COLOR_ID_AMBER>;
			function = LED_FUNCTION_LAN;
			gpios = <&pio 34 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "netdev";
		};

		led-2 {
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_LAN;
			gpios = <&pio 35 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "netdev";
		};
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_5v: regulator-5v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-5V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

&eth {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	/* WAN interface */
	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		nvmem-cells = <&wan_factory_mac 0>;
		nvmem-cell-names = "mac-address";
		phy-mode = "2500base-x";
		phy-handle = <&phy15>;
	};

	/* LAN interface */
	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		phy-mode = "gmii";
		phy-handle = <&int_gbe_phy>;
	};
};

&mdio_bus {
	phy15: ethernet-phy@f {
		compatible = "ethernet-phy-id03a2.a411";
		reg = <0xf>;
		interrupt-parent = <&pio>;
		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
		reset-assert-us = <10000>;
		reset-deassert-us = <20000>;
		airoha,pnswap-rx;

		leds {
			#address-cells = <1>;
			#size-cells = <0>;

			led@0 {
				reg = <0>;
				function = LED_FUNCTION_WAN;
				color = <LED_COLOR_ID_AMBER>;
			};

			led@1 {
				reg = <1>;
				function = LED_FUNCTION_WAN;
				color = <LED_COLOR_ID_GREEN>;
			};
		};
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie_pins>;
	status = "okay";
};

&pio {
	pcie_pins: pcie-pins {
		mux {
			function = "pcie";
			groups = "pcie_pereset";
		};
	};

	pwm_pins: pwm-pins {
		mux {
			function = "pwm";
			groups = "pwm0_0", "pwm1_1";
		};
	};

	spi2_flash_pins: spi2-pins {
		mux {
			function = "spi";
			groups = "spi2";
		};

		conf-pu {
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
			drive-strength = <8>;
			pins = "SPI2_CS", "SPI2_WP";
		};

		conf-pd {
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
			drive-strength = <8>;
			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
		};
	};

	wifi_dbdc_pins: wifi-dbdc-pins {
		mux {
			function = "eth";
			groups = "wf0_mode1";
		};

		conf {
			pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4",
			       "WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6",
			       "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10",
			       "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ",
			       "WF_CBA_RESETB", "WF_DIG_RESETB";
			drive-strength = <4>;
		};
	};
};

&pwm {
	pinctrl-names = "default";
	pinctrl-0 = <&pwm_pins>;
	status = "okay";
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi2_flash_pins>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				reg = <0x00000 0x40000>;
				label = "bl2-nor";
			};

			partition@40000 {
				reg = <0x40000 0xc0000>;
				label = "factory";
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					wifi_factory_calibration: eeprom@0 {
						reg = <0x0 0x1000>;
					};

					wan_factory_mac: macaddr@24 {
						reg = <0x24 0x6>;
						compatible = "mac-base";
						#nvmem-cell-cells = <1>;
					};
				};
			};

			partition@100000 {
				reg = <0x100000 0x80000>;
				label = "fip-nor";
			};

			partition@180000 {
				reg = <0x180000 0xc80000>;
				label = "recovery";
			};
		};
	};
};

&sgmiisys0 {
	mediatek,pnswap;
};

&uart0 {
	status = "okay";
};

&usb_phy {
	status = "okay";
};

&wifi {
	nvmem-cells = <&wifi_factory_calibration>;
	nvmem-cell-names = "eeprom";
	pinctrl-names = "dbdc";
	pinctrl-0 = <&wifi_dbdc_pins>;
	status = "okay";
};

&xhci {
	phys = <&u2port0 PHY_TYPE_USB2>;
	vusb33-supply = <&reg_3p3v>;
	vbus-supply = <&reg_5v>;
	mediatek,u3p-dis-msk = <0x01>;
	status = "okay";
};