Path: blob/master/arch/arm64/include/uapi/asm/sigcontext.h
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */1/*2* Copyright (C) 2012 ARM Ltd.3*4* This program is free software; you can redistribute it and/or modify5* it under the terms of the GNU General Public License version 2 as6* published by the Free Software Foundation.7*8* This program is distributed in the hope that it will be useful,9* but WITHOUT ANY WARRANTY; without even the implied warranty of10* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the11* GNU General Public License for more details.12*13* You should have received a copy of the GNU General Public License14* along with this program. If not, see <http://www.gnu.org/licenses/>.15*/16#ifndef _UAPI__ASM_SIGCONTEXT_H17#define _UAPI__ASM_SIGCONTEXT_H1819#ifndef __ASSEMBLY__2021#include <linux/types.h>2223/*24* Signal context structure - contains all info to do with the state25* before the signal handler was invoked.26*/27struct sigcontext {28__u64 fault_address;29/* AArch64 registers */30__u64 regs[31];31__u64 sp;32__u64 pc;33__u64 pstate;34/* 4K reserved for FP/SIMD state and future expansion */35__u8 __reserved[4096] __attribute__((__aligned__(16)));36};3738/*39* Allocation of __reserved[]:40* (Note: records do not necessarily occur in the order shown here.)41*42* size description43*44* 0x210 fpsimd_context45* 0x10 esr_context46* 0x8a0 sve_context (vl <= 64) (optional)47* 0x20 extra_context (optional)48* 0x10 terminator (null _aarch64_ctx)49*50* 0x510 (reserved for future allocation)51*52* New records that can exceed this space need to be opt-in for userspace, so53* that an expanded signal frame is not generated unexpectedly. The mechanism54* for opting in will depend on the extension that generates each new record.55* The above table documents the maximum set and sizes of records than can be56* generated when userspace does not opt in for any such extension.57*/5859/*60* Header to be used at the beginning of structures extending the user61* context. Such structures must be placed after the rt_sigframe on the stack62* and be 16-byte aligned. The last structure must be a dummy one with the63* magic and size set to 0.64*65* Note that the values allocated for use as magic should be chosen to66* be meaningful in ASCII to aid manual parsing, ZA doesn't follow this67* convention due to oversight but it should be observed for future additions.68*/69struct _aarch64_ctx {70__u32 magic;71__u32 size;72};7374#define FPSIMD_MAGIC 0x465080017576struct fpsimd_context {77struct _aarch64_ctx head;78__u32 fpsr;79__u32 fpcr;80__uint128_t vregs[32];81};8283/*84* Note: similarly to all other integer fields, each V-register is stored in an85* endianness-dependent format, with the byte at offset i from the start of the86* in-memory representation of the register value containing87*88* bits [(7 + 8 * i) : (8 * i)] of the register on little-endian hosts; or89* bits [(127 - 8 * i) : (120 - 8 * i)] on big-endian hosts.90*/9192/* ESR_EL1 context */93#define ESR_MAGIC 0x455352019495struct esr_context {96struct _aarch64_ctx head;97__u64 esr;98};99100#define POE_MAGIC 0x504f4530101102struct poe_context {103struct _aarch64_ctx head;104__u64 por_el0;105};106107/*108* extra_context: describes extra space in the signal frame for109* additional structures that don't fit in sigcontext.__reserved[].110*111* Note:112*113* 1) fpsimd_context, esr_context and extra_context must be placed in114* sigcontext.__reserved[] if present. They cannot be placed in the115* extra space. Any other record can be placed either in the extra116* space or in sigcontext.__reserved[], unless otherwise specified in117* this file.118*119* 2) There must not be more than one extra_context.120*121* 3) If extra_context is present, it must be followed immediately in122* sigcontext.__reserved[] by the terminating null _aarch64_ctx.123*124* 4) The extra space to which datap points must start at the first125* 16-byte aligned address immediately after the terminating null126* _aarch64_ctx that follows the extra_context structure in127* __reserved[]. The extra space may overrun the end of __reserved[],128* as indicated by a sufficiently large value for the size field.129*130* 5) The extra space must itself be terminated with a null131* _aarch64_ctx.132*/133#define EXTRA_MAGIC 0x45585401134135struct extra_context {136struct _aarch64_ctx head;137__u64 datap; /* 16-byte aligned pointer to extra space cast to __u64 */138__u32 size; /* size in bytes of the extra space */139__u32 __reserved[3];140};141142#define SVE_MAGIC 0x53564501143144struct sve_context {145struct _aarch64_ctx head;146__u16 vl;147__u16 flags;148__u16 __reserved[2];149};150151#define SVE_SIG_FLAG_SM 0x1 /* Context describes streaming mode */152153/* TPIDR2_EL0 context */154#define TPIDR2_MAGIC 0x54504902155156struct tpidr2_context {157struct _aarch64_ctx head;158__u64 tpidr2;159};160161/* FPMR context */162#define FPMR_MAGIC 0x46504d52163164struct fpmr_context {165struct _aarch64_ctx head;166__u64 fpmr;167};168169#define ZA_MAGIC 0x54366345170171struct za_context {172struct _aarch64_ctx head;173__u16 vl;174__u16 __reserved[3];175};176177#define ZT_MAGIC 0x5a544e01178179struct zt_context {180struct _aarch64_ctx head;181__u16 nregs;182__u16 __reserved[3];183};184185#define GCS_MAGIC 0x47435300186187struct gcs_context {188struct _aarch64_ctx head;189__u64 gcspr;190__u64 features_enabled;191__u64 reserved;192};193194#endif /* !__ASSEMBLY__ */195196#include <asm/sve_context.h>197198/*199* The SVE architecture leaves space for future expansion of the200* vector length beyond its initial architectural limit of 2048 bits201* (16 quadwords).202*203* See linux/Documentation/arch/arm64/sve.rst for a description of the VL/VQ204* terminology.205*/206#define SVE_VQ_BYTES __SVE_VQ_BYTES /* bytes per quadword */207208#define SVE_VQ_MIN __SVE_VQ_MIN209#define SVE_VQ_MAX __SVE_VQ_MAX210211#define SVE_VL_MIN __SVE_VL_MIN212#define SVE_VL_MAX __SVE_VL_MAX213214#define SVE_NUM_ZREGS __SVE_NUM_ZREGS215#define SVE_NUM_PREGS __SVE_NUM_PREGS216217#define sve_vl_valid(vl) __sve_vl_valid(vl)218#define sve_vq_from_vl(vl) __sve_vq_from_vl(vl)219#define sve_vl_from_vq(vq) __sve_vl_from_vq(vq)220221/*222* If the SVE registers are currently live for the thread at signal delivery,223* sve_context.head.size >=224* SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl))225* and the register data may be accessed using the SVE_SIG_*() macros.226*227* If sve_context.head.size <228* SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl)),229* the SVE registers were not live for the thread and no register data230* is included: in this case, the SVE_SIG_*() macros should not be231* used except for this check.232*233* The same convention applies when returning from a signal: a caller234* will need to remove or resize the sve_context block if it wants to235* make the SVE registers live when they were previously non-live or236* vice-versa. This may require the caller to allocate fresh237* memory and/or move other context blocks in the signal frame.238*239* Changing the vector length during signal return is not permitted:240* sve_context.vl must equal the thread's current vector length when241* doing a sigreturn.242*243* On systems with support for SME the SVE register state may reflect either244* streaming or non-streaming mode. In streaming mode the streaming mode245* vector length will be used and the flag SVE_SIG_FLAG_SM will be set in246* the flags field. It is permitted to enter or leave streaming mode in247* a signal return, applications should take care to ensure that any difference248* in vector length between the two modes is handled, including any resizing249* and movement of context blocks.250*251* Note: for all these macros, the "vq" argument denotes the vector length252* in quadwords (i.e., units of 128 bits).253*254* The correct way to obtain vq is to use sve_vq_from_vl(vl). The255* result is valid if and only if sve_vl_valid(vl) is true. This is256* guaranteed for a struct sve_context written by the kernel.257*258*259* Additional macros describe the contents and layout of the payload.260* For each, SVE_SIG_x_OFFSET(args) is the start offset relative to261* the start of struct sve_context, and SVE_SIG_x_SIZE(args) is the262* size in bytes:263*264* x type description265* - ---- -----------266* REGS the entire SVE context267*268* ZREGS __uint128_t[SVE_NUM_ZREGS][vq] all Z-registers269* ZREG __uint128_t[vq] individual Z-register Zn270*271* PREGS uint16_t[SVE_NUM_PREGS][vq] all P-registers272* PREG uint16_t[vq] individual P-register Pn273*274* FFR uint16_t[vq] first-fault status register275*276* Additional data might be appended in the future.277*278* Unlike vregs[] in fpsimd_context, each SVE scalable register (Z-, P- or FFR)279* is encoded in memory in an endianness-invariant format, with the byte at280* offset i from the start of the in-memory representation containing bits281* [(7 + 8 * i) : (8 * i)] of the register value.282*/283284#define SVE_SIG_ZREG_SIZE(vq) __SVE_ZREG_SIZE(vq)285#define SVE_SIG_PREG_SIZE(vq) __SVE_PREG_SIZE(vq)286#define SVE_SIG_FFR_SIZE(vq) __SVE_FFR_SIZE(vq)287288#define SVE_SIG_REGS_OFFSET \289((sizeof(struct sve_context) + (__SVE_VQ_BYTES - 1)) \290/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)291292#define SVE_SIG_ZREGS_OFFSET \293(SVE_SIG_REGS_OFFSET + __SVE_ZREGS_OFFSET)294#define SVE_SIG_ZREG_OFFSET(vq, n) \295(SVE_SIG_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n))296#define SVE_SIG_ZREGS_SIZE(vq) __SVE_ZREGS_SIZE(vq)297298#define SVE_SIG_PREGS_OFFSET(vq) \299(SVE_SIG_REGS_OFFSET + __SVE_PREGS_OFFSET(vq))300#define SVE_SIG_PREG_OFFSET(vq, n) \301(SVE_SIG_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n))302#define SVE_SIG_PREGS_SIZE(vq) __SVE_PREGS_SIZE(vq)303304#define SVE_SIG_FFR_OFFSET(vq) \305(SVE_SIG_REGS_OFFSET + __SVE_FFR_OFFSET(vq))306307#define SVE_SIG_REGS_SIZE(vq) \308(__SVE_FFR_OFFSET(vq) + __SVE_FFR_SIZE(vq))309310#define SVE_SIG_CONTEXT_SIZE(vq) \311(SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq))312313/*314* If the ZA register is enabled for the thread at signal delivery then,315* za_context.head.size >= ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(za_context.vl))316* and the register data may be accessed using the ZA_SIG_*() macros.317*318* If za_context.head.size < ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(za_context.vl))319* then ZA was not enabled and no register data was included in which case320* ZA register was not enabled for the thread and no register data321* the ZA_SIG_*() macros should not be used except for this check.322*323* The same convention applies when returning from a signal: a caller324* will need to remove or resize the za_context block if it wants to325* enable the ZA register when it was previously non-live or vice-versa.326* This may require the caller to allocate fresh memory and/or move other327* context blocks in the signal frame.328*329* Changing the vector length during signal return is not permitted:330* za_context.vl must equal the thread's current SME vector length when331* doing a sigreturn.332*/333334#define ZA_SIG_REGS_OFFSET \335((sizeof(struct za_context) + (__SVE_VQ_BYTES - 1)) \336/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)337338#define ZA_SIG_REGS_SIZE(vq) (((vq) * __SVE_VQ_BYTES) * ((vq) * __SVE_VQ_BYTES))339340#define ZA_SIG_ZAV_OFFSET(vq, n) (ZA_SIG_REGS_OFFSET + \341(SVE_SIG_ZREG_SIZE(vq) * (n)))342343#define ZA_SIG_CONTEXT_SIZE(vq) \344(ZA_SIG_REGS_OFFSET + ZA_SIG_REGS_SIZE(vq))345346#define ZT_SIG_REG_SIZE 512347348#define ZT_SIG_REG_BYTES (ZT_SIG_REG_SIZE / 8)349350#define ZT_SIG_REGS_OFFSET sizeof(struct zt_context)351352#define ZT_SIG_REGS_SIZE(n) (ZT_SIG_REG_BYTES * (n))353354#define ZT_SIG_CONTEXT_SIZE(n) \355(sizeof(struct zt_context) + ZT_SIG_REGS_SIZE(n))356357#endif /* _UAPI__ASM_SIGCONTEXT_H */358359360