Path: blob/master/arch/csky/abiv1/inc/abi/pgtable-bits.h
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/* SPDX-License-Identifier: GPL-2.0 */12#ifndef __ASM_CSKY_PGTABLE_BITS_H3#define __ASM_CSKY_PGTABLE_BITS_H45/* implemented in software */6#define _PAGE_PRESENT (1<<0)7#define _PAGE_READ (1<<1)8#define _PAGE_WRITE (1<<2)9#define _PAGE_ACCESSED (1<<3)10#define _PAGE_MODIFIED (1<<4)1112/* We borrow bit 9 to store the exclusive marker in swap PTEs. */13#define _PAGE_SWP_EXCLUSIVE (1<<9)1415/* implemented in hardware */16#define _PAGE_GLOBAL (1<<6)17#define _PAGE_VALID (1<<7)18#define _PAGE_DIRTY (1<<8)1920#define _PAGE_CACHE (3<<9)21#define _PAGE_UNCACHE (2<<9)22#define _PAGE_SO _PAGE_UNCACHE23#define _CACHE_MASK (7<<9)2425#define _CACHE_CACHED _PAGE_CACHE26#define _CACHE_UNCACHED _PAGE_UNCACHE2728#define _PAGE_PROT_NONE _PAGE_READ2930/*31* Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that32* are !pte_none() && !pte_present().33*34* Format of swap PTE:35* bit 0: _PAGE_PRESENT (zero)36* bit 1: _PAGE_READ (zero)37* bit 2 - 5: swap type[0 - 3]38* bit 6: _PAGE_GLOBAL (zero)39* bit 7: _PAGE_VALID (zero)40* bit 8: swap type[4]41* bit 9: exclusive marker42* bit 10 - 31: swap offset43*/44#define __swp_type(x) ((((x).val >> 2) & 0xf) | \45(((x).val >> 4) & 0x10))46#define __swp_offset(x) ((x).val >> 10)47#define __swp_entry(type, offset) ((swp_entry_t) { \48((type & 0xf) << 2) | \49((type & 0x10) << 4) | \50((offset) << 10)})5152#define HAVE_ARCH_UNMAPPED_AREA5354#endif /* __ASM_CSKY_PGTABLE_BITS_H */555657